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ADS8910B

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18-Bit, 1-MSPS, 1-Ch SAR ADC with Internal VREF Buffer, Internal LDO and Enhanced SPI Interface

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18-Bit, 1-MSPS, 1-Ch SAR ADC with Internal VREF Buffer, Internal LDO and Enhanced SPI Interface

ADS8910B

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Parameters

Resolution (Bits) 18 Number of input channels 1 Sample rate (Max) (kSPS) 1000 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration — Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) -5 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 21 Analog voltage AVDD (Min) (V) 3 SNR (dB) 102.5 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 1.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5 open-in-new Find other Precision ADCs (<=10MSPS)

Package | Pins | Size

VQFN (RGE) 24 16 mm² 4 x 4 open-in-new Find other Precision ADCs (<=10MSPS)

Features

  • Resolution: 18-Bits
  • High Sample Rate With No Latency Output:
    • ADS8910B: 1-MSPS
    • ADS8912B: 500-kSPS
    • ADS8914B: 250-kSPS
  • Integrated LDO Enables Single-Supply Operation
  • Low-Power Reference Buffer With No Droop
  • Excellent AC and DC Performance:
    • SNR: 102.5-dB, THD: –125-dB
    • INL: ±0.5-LSB
    • DNL: ±0.2-LSB, 18-Bit No-Missing-Codes
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Single-Supply, Low-Power Operation
    (Includes Internal Reference Buffer and LDO)
    • ADS8910B : 21-mW at 1-MSPS
    • ADS8912B : 16-mW at 500-kSPS
    • ADS8914B : 14-mW at 250-kSPS
  • Enhanced-SPI Digital Interface
    • Interface SCLK: 20-MHz at 1-MSPS
    • Configurable Data Parity Output
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
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Description

The ADS8910B, ADS8912B, and ADS8914B (ADS891xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 18-bit successive approximation register (SAR) analog-to-digital convertors (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) and ADS892xB (16-bit) resolution variants.

The ADS891xB boost analog performance while maintaining high-resolution data transfer by using TI’s enhanced-SPI feature. Enhanced-SPI enables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, thereby making this device an excellent choice for applications involving FPGAs, DSPs. The ADS89xxB is compatible with a standard SPI Interface.

The ADS891xB has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Technical documentation

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Type Title Date
* Data sheet ADS891xB 18-Bit, High-Speed SAR ADCs With Integrated Reference Buffer and Enhanced Performance Features datasheet (Rev. B) Jan. 26, 2018
Application note High-voltage battery monitor circuit: ±20V, 0–10kHz, 18-bit fully differential (Rev. A) Jan. 23, 2019
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs Jun. 14, 2018
Application note High-current battery monitor circuit: 0–10A, 0-10kHz, 18 bit Dec. 22, 2017
Application note Improving Input Settling for Precision Data Converters Dec. 12, 2017
Application note Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters Dec. 12, 2017
Application note Simplify Isolation Designs Using an Enhanced-SPI ADC Interface Dec. 11, 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI Nov. 08, 2016
User guide ADS8910BEVM-PDK Jul. 01, 2016
More literature ADS8910EVM-PDK Quick Start Guide Mar. 16, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
Description

The ADS8900B evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS8900B successive-approximation register (SAR) analog-to-digital converter (ADC), which is a fully-differential input, 20-bit, 1-MSPS device (...)

Features
  • Includes hardware and software required for diagnostic testing, as well as accurate performance evaluation of the ADS8900B ADC
  • USB powered; no external power supply required
  • PHI controller provides convenient communication interface to ADS8900B ADC over a USB 2.0 (or higher) for power delivery, as (...)
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Software development

SUPPORT SOFTWARE Download
SBAC183.ZIP (103 KB)

Design tools & simulation

SIMULATION MODEL Download
SBAM275.ZIP (22 KB) - IBIS Model
SIMULATION MODEL Download
SBAM276.TSM (24 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SBAM277.TSC (7079 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SBAM340.ZIP (136 KB) - TINA-TI Spice Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
View details
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI — TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
CALCULATION TOOL Download
Analog-to-digital converter (ADC) input driver design tool supporting multiple input types
ADC-INPUT-CALC — ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and transformer-coupled (...)
CALCULATION TOOL Download
Analog engineer's calculator
ANALOG-ENGINEER-CALC — The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Features
  • Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
    • Noise calculations
    • Common unit translation
  • Solves common amplifier circuit design problems
    • Gain selections using standard resistors
    • Filter configurations
    • Total noise for common amplifier configurations
  • (...)
View details

Reference designs

REFERENCE DESIGNS Download
Transmitting SPI Signals Over LVDS Interface Reference Design
TIDA-060017 — This reference design demonstrates how to resolve and optimize signal integrity challenges typically found when sending SPI signals over longer distance on the same PCB or off PCB to another board in a noisy environment by transmitting SPI signals over an LVDS interface. The concept offers (...)
document-generic Schematic
REFERENCE DESIGNS Download
Reference Design Optimizing FPGA Utilization and Data Throughput for Automatic Test Equipment
TIDA-01051 — The TIDA-01051 reference design is used to demonstrate optimized channel density, integration, power consumption, clock distribution and signal chain performance of very high channel count data acquisition (DAQ) systems such as those used in automatic test equipment (ATE). Using serializers, such as (...)
document-generic Schematic
REFERENCE DESIGNS Download
Optimized Analog Front End DAQ System Reference Design for 18 bit SAR Data Converters
TIDA-01050 — The TIDA-01050 reference design aims to improve the integration, power consumption, performance, and clocking issues typically associated with automatic test equipment. This design is applicable to any ATE system but most applicable to systems requiring a large number of input channels.
document-generic Schematic
REFERENCE DESIGNS Download
ADC Driver Reference Design Improving Full Scale THD Using Negative Supply
TIDA-01052 — The TIDA-01052 reference design aims to highlight system performance increases seen using a negative voltage rail on the analog front end driver amplifiers rather than ground. This concept is relative to all analog front ends, however this design is aimed specifically at automatic test equipment.
document-generic Schematic
REFERENCE DESIGNS Download
20-bit, 1-MSPS, 4-Ch Small Form Factor Design for Test and Measurement Applications Reference Design
TIPD211 — End equipment such as mixed signal SOC testers, memory testers, battery testers, liquid-crystal display (LCD) testers, benchtop equipment, high-density digital cards, high-density power cards, x-Ray, MRI, and so forth require multiple, fast, simultaneous sampling channels with excellent DC and AC (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
VQFN (RGE) 24 View options

Ordering & quality

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