Dual-channel RF-sampling AFE with 14-bit 9-GSPS DAC and 3-GSPS ADC with bypass mode
Product details
Parameters
Package | Pins | Size
Features
- Two, 14-bit, 9-GSPS DACs
- Up to 1200-MHz signal bandwidth
- 1 DSA per channel tunes output power
- Two, 14-Bit, 3-GSPS ADCs
- Up to 1500-MHz signal bandwidth
- NSD: –151 dBFS/Hz
- AC performance at fIN = 2.6 GHz, –3 dBFS
- SNR: 55 dBFS
- SFDR: 73 dBc HD2 and HD3
- SFDR: 91 dBc worst spur
- 2 DSA per channel extends dynamic range
- RF and digital power detectors
- RF frequency range: 10 MHz to 6 GHz
- Fast frequency hopping < 1 µs
- Receive digital signal path:
- Bypassable quad DDC per ADC
- 3-phase coherent 32-bit NCOs per DDC
- Decimation ratio: 2x to 32x
- Transmit digital signal path:
- Quad DUC per DAC with 32-bit NCOs
- Interpolation ratio: 6x to 36x
- Sin(x)/x correction and configurable delay
- Power amplifier protection (PAP)
- JESD204B interface:
- 8 transceivers at up to 15 Gbps
- Subclass 1 multichip synchronization
- Clocks:
- Internal PLL and VCO with bypass option
- Clock output up to 3 GHz with clock divider
- DAC power dissipation: 1.8 W/ch at 9 GSPS
- ADC power dissipation: 1.9 W/ch at 3 GSPS
- Package: 17-mm x 17-mm FC BGA, 0.8-mm pitch
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Description
The AFE7422 is a dual-channel, wideband, RF-sampling analog front end (AFE) based on 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs. With operation at an RF of up to 6 GHz, this device enables direct RF sampling into the C-band frequency range without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multimission systems.
The DAC signal paths support interpolation and digital up conversion options that deliver up to 1200 MHz of signal bandwidth. The differential output path includes a digital step attenuator (DSA), which enables tuning of output power.
Each ADC input path includes a dual DSA and RF and Digital power detectors. Flexible decimation options provide optimization of data bandwidth and a decimation bypass mode is also available for widest signal bandwidth.
An 8-lane (8 TX + 8 RX) subclass-1 compliant JESD204B interface operates at up to 15 Gbps. A bypassable on-chip PLL simplifies clock operation with an optional clock output.
More information
See the full data sheet and other design resources for the AFE7422. Request now
For commercial wireless applications, see our wireless infrastructure RF-sampling AFEs.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | AFE7422 Dual-channel, RF-sampling AFE with 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs datasheet (Rev. A) | Jan. 25, 2019 |
Application note | AFE74xx Power Dissipation Comparison Across Modes | Dec. 07, 2019 | |
Technical articles | So, what's a VNA anyway? | Aug. 23, 2019 | |
Technical articles | So, what's the deal with frequency response? | Aug. 23, 2019 | |
Application note | Temp Profile to Maintain Optimum FIT Performance | Jul. 23, 2019 | |
Technical articles | So, what are S-parameters anyway? | May 23, 2019 | |
Technical articles | How to achieve fast frequency hopping | Mar. 03, 2019 | |
Application note | AFE74xx as a single-chip wideband repeater using loopback mode | Jan. 29, 2019 | |
Application note | Evaluating the frequency hopping capability of the AFE74xx | Dec. 03, 2018 | |
User guide | AFE7444EVM and AFE7422EVM User's Guide | Oct. 10, 2018 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The AFE7422 evaluation module (EVM) is an RF-sampling transceiver platform that can be configured to support up to two-transmit and two-receive (2T2R) channels simultaneously. The module evaluates the AFE7422 device, which is a dual-channel RF-sampling analog front end (...)
Features
- Allows evaluation of 4T4R RF-sampling AFE7422 solutions
- JESD204B data interface to simplify digital interface; compliant up to 15-Gbps lane rates
- Supports JESD204B subclass 1 for synchronization and compatibility
- Option for DC-DC-based LDO-less power-management solution
- Onboard clocking solution (...)
Software development
Features
- Compatible with JEDEC JESD204a/b/c protocols
- Supports subclass 1 deterministic latency and multidevice synchronization
- Supported lane rates
- Up to 16.375 Gbps in 8b/10b mode
- Up to 20 Gbps in 64b/66b mode
- Supports all protocol related error detection and reporting features
- Integrated transport layer (...)
Design tools & simulation
In the concept phase, a frequency-planning tool enables fine tuning of both (...)
Features
- Frequency planning
- Analog filtering
- Decimation filter spur location
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
FCBGA (ABJ) | 400 | View options |
FCBGA (ALK) | 400 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
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