Product details

Technology Family CD4000 Supply voltage (Min) (V) 3 Supply voltage (Max) (V) 18 Number of channels (#) 6 IOL (Max) (mA) 18 ICC (Max) (uA) 120 IOH (Max) (mA) -3.1 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns), Input clamp diode Rating Catalog
Technology Family CD4000 Supply voltage (Min) (V) 3 Supply voltage (Max) (V) 18 Number of channels (#) 6 IOL (Max) (mA) 18 ICC (Max) (uA) 120 IOH (Max) (mA) -3.1 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns), Input clamp diode Rating Catalog
PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 SOIC (DW) 16 77 mm² 7.52 x 10.28 SOP (NS) 16 80 mm² 10.2 x 7.8 TSSOP (PW) 16 22 mm² 4.4 x 5
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Technical documentation

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Type Title Date
* Data sheet CD4049UB, CD4050B datasheet (Rev. K) 26 Jun 2020
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 Dec 2001

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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Simulation model

CD4050B PSPICE Model (Rev. A)

SCHM018A.ZIP (7 KB) - PSpice Model
Package Pins Download
PDIP (N) 16 View options
SO (NS) 16 View options
SOIC (D) 16 View options
SOIC (DW) 16 View options
TSSOP (PW) 16 View options

Ordering & quality

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  • Ongoing reliability monitoring

Support & training

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