Packaging information
| Package | Pins SOIC (DW) | 20 |
| Operating temperature range (°C) 0 to 70 |
| Package qty | Carrier 25 | TUBE |
Features for the CD74FCT623
- BiCMOS Technology With Low Quiescent Power
- Buffered Inputs
- Noninverted Outputs
- Input/Output Isolation From VCC
- Controlled Output Edge Rates
- 64-mA Output Sink Current
- Output Voltage Swing Limited to 3.7 V
- SCR Latch-Up-Resistant BiCMOS Process and Circuit Design
- Package Options Include Plastic Small-Outline (M) and Shrink Small-Outline (SM) Packages and Standard Plastic (E) DIP
Description for the CD74FCT623
The CD74FCT623 is an octal bus transceiver that uses a small-geometry BiCMOS technology. The output stage is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 mA.
This device is a noninverting, 3-state, bidirectional transceiver-buffer intended for two-way transmission from A bus to B bus or B bus to A bus, depending on the logic levels of the output-enable (OEAB, OEBA\) inputs.
The dual output-enable provision gives these devices the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input under these conditions, and when all other data sources to the bus lines are at high impedance, both sets of bus lines remain in their last states.
The CD74FCT623 is characterized for operation from 0°C to 70°C.