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DSBGA (YVA) 48 0 mm² 8 x 9
  • Pre-programmed Xilinx PROM configures the DLPC910 DMD digital controller
  • I/O pins compatible with 1.8 V to 3.3 V
  • 1.8 V core supply voltage
  • –40°C to 85°C operating temperature range
  • Pre-programmed Xilinx PROM configures the DLPC910 DMD digital controller
  • I/O pins compatible with 1.8 V to 3.3 V
  • 1.8 V core supply voltage
  • –40°C to 85°C operating temperature range

The DLPR910 device is a programmed PROM used to properly configure the DLPC910 DLPC910ZYR Controller to operate four different digital micromirror device (DMD) options: the DLP9000X, the DLP9000XUV, and the DLP6500 family (S600 and Type A packages). The firmware in this device enables the DLPC910 DLPC910ZYRController to provide system data throughput rates up to 61 Gigabits per second (Gbps) for the DLP9000X and DLP9000XUV, and up to 24 Gbps for the DLP6500 family, with the options for random row addressing and Load4 capabilities.

Get started with TI DLP® light-control technology page to learn how to get started with the DLPC410ZYR. The DLP advanced light control resources on ti.com accelerate time to market, which include evaluation modules, reference designs, optical modules manufacturers, and DLP design network partners.

The DLPR910 device is a programmed PROM used to properly configure the DLPC910 DLPC910ZYR Controller to operate four different digital micromirror device (DMD) options: the DLP9000X, the DLP9000XUV, and the DLP6500 family (S600 and Type A packages). The firmware in this device enables the DLPC910 DLPC910ZYRController to provide system data throughput rates up to 61 Gigabits per second (Gbps) for the DLP9000X and DLP9000XUV, and up to 24 Gbps for the DLP6500 family, with the options for random row addressing and Load4 capabilities.

Get started with TI DLP® light-control technology page to learn how to get started with the DLPC410ZYR. The DLP advanced light control resources on ti.com accelerate time to market, which include evaluation modules, reference designs, optical modules manufacturers, and DLP design network partners.

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Technical documentation

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Type Title Date
* Data sheet DLPR910 Configuration PROM datasheet (Rev. D) PDF | HTML 18 Feb 2021
Application note DLPC910 / DLPR910A - Continuous Row Command Operation 09 Feb 2018
Technical article Three fast facts about our fastest, highest resolution chipset for industrial applications 07 Oct 2015
Application note System Design Considerations Using TI DLP Technology Down to 400 nm 12 Nov 2014

Design & development

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Reference designs

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Schematic: PDF
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DSBGA (YVA) 48 View options

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