Extended temperature, high-immunity gigabit Ethernet PHY transceiver with copper & fiber interface
Product details
Parameters
Package | Pins | Size
Features
- Multiple Operating Modes
- Media Support: Copper and Fiber
- Media Conversion Between Copper and Fiber
- Bridge Between RGMII and SGMII
- Maximum Ambient Temperature of 125ºC
- Exceeds 8-kV IEC61000-4-2 ESD
- Low RGMII Latency
- Total Latency ≤ 384ns for 1000Base-T
- Total Latency ≤ 361ns for 100Base-TX
- Low Power Consumption
- < 150 mW for 1000Base-X
- < 500 mW for 1000Base-T
- Time Sensitive Network (TSN) Compliant
- Recovered Clock Output for SyncE
- Selectable Synchronized Clock Output: 25 MHz and 125 MHz
- 1000Base-X, 100Base-FX Compatible With SFP MSA Specification
- IEEE1588 Support via SFD
- Wake On LAN Support
- Configurable IO Voltages: 1.8 V, 2.5 V, and 3.3 V
- SGMII, RGMII, MII MAC Interface
- Jumbo Frame Support for 1000M and 100M Speed
- Cable Diagnostics
- TDR
- BIST
- Programmable RGMII Termination Impedance
- Integrated MDI Termination Resistor
- Fast Link Drop modes
- Compatible to IEEE 802.3 1000Base-T, 100Base-TX, 10Base-Te,1000Base-X, 100Base-FX
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Description
The DP83869HM device is a robust, fully-featured Gigabit Physical Layer (PHY) transceiver with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and 100BASE-FX Fiber protocols. Optimized for ESD protection, the DP83869HM exceeds 8-kV IEC 61000-4-2 (direct contact).This device interfaces to the MAC layer through Reduced GMII (RGMII) and SGMII. In 100M mode, the device lets the designer use MII for lower Latency. Programmable integrated termination impedance on RGMII/MII helps reduce system BOM.
The DP83869HM supports Media Conversion in Managed mode. In this mode, the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX conversions.
The DP83869HM can also support Bridge Conversion from RGMII to SGMII and SGMII to RGMII. The DP83869HM is compliant to TSN standards and offers low latency.
The DP83869HM can also generate IEEE 1588 Sync Frame Detect indications to MAC. This can reduce the jitter in Time Synchronization and help the System account for asymmetric delays in Transmission and Reception of packets.
The standard Ethernet system block diagram is shown on the first page. Designers can also use the DP83869 in Media Convertor mode, in RGMII-to-SGMII Bridge applications, and in SGMII-RGMII Bridge applications.
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
Technical documentation
| Type | Title | Date | |
|---|---|---|---|
| * | Datasheet | DP83869HM High Immunity 10/100/1000 Ethernet Physical Layer Transceiver With Copper and Fiber Interface datasheet (Rev. A) | Nov. 20, 2018 |
| Application note | 88E1512 to DP83867 and DP83869 System Rollover | Aug. 30, 2019 | |
| Application note | AR8031 to DP83867 and DP83869 System Rollover | Aug. 30, 2019 | |
| Technical article | Solving synchronization challenges in Industrial Ethernet | Jul. 19, 2019 | |
| Application note | Understanding different modes of operation in DP83869 | Feb. 12, 2019 | |
| Application note | Selection and specification of crystals for Texas Instruments ethernet physical | Feb. 06, 2019 | |
| Application note | DP83869 1000Base-X Link Detection | Dec. 04, 2018 | |
| User guide | DP83869EVM User's Guide | Apr. 20, 2018 | |
| Technical article | Fiber in industrial applications | Apr. 21, 2016 | |
| Technical article | Three things you should know about Ethernet PHY | Jul. 15, 2015 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Copper and fiber Ethernet
- Media convertor and bridge mode
- On-board MSP430F5529 with USB-2-MDIO for register access
- Supports interoperability testing, compliance testing and BER testing
Software development
The USB-2-MDIO software lets you directly access the registers during debug and prototyping. (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| VQFN (RGZ) | 48 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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