Product details

Arm CPU 2 Arm Cortex-A15 Arm MHz (Max.) 1000 Co-processor(s) 2 Dual Arm Cortex-M4 CPU 32-bit Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet Ethernet MAC 1-Port 10/100/1000, 2-Port 1Gb switch PCIe 1 PCIe Gen 2 Hardware accelerators 1 Image Video Accelerator, 2 Viterbi Decoder, Audio Tracking Features Multimedia Operating system Android, Linux, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection Rating Automotive
Arm CPU 2 Arm Cortex-A15 Arm MHz (Max.) 1000 Co-processor(s) 2 Dual Arm Cortex-M4 CPU 32-bit Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet Ethernet MAC 1-Port 10/100/1000, 2-Port 1Gb switch PCIe 1 PCIe Gen 2 Hardware accelerators 1 Image Video Accelerator, 2 Viterbi Decoder, Audio Tracking Features Multimedia Operating system Android, Linux, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection Rating Automotive
  • Architecture designed for infotainment applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
    • 2D and 3D graphics
  • Dual Arm® Cortex®-A15 microprocessor subsystem
  • Up to two C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 x 16-Bit fixed-point multiplies per cycle
  • Up to 2.5MB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
    • Supports up to DDR2-800 and DDR3-1066
    • Up to 2GB supported per EMIF
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • Up to two Embedded Vision Engines (EVEs)
  • IVA subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • Video Processing Engine (VPE)
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Dual-core PowerVR® SGX544 3D GPU
  • Three Video Input Port (VIP) modules
    • Support for up to 10 multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-port gigabit ethernet (GMAC)
  • Sixteen 32-Bit general-purpose timers
  • 32-Bit MPU watchdog timer
  • Five Inter-Integrated Circuit (I2C™) ports
  • HDQ™/1-Wire® interface
  • SATA interface
  • MediaLB® (MLB) subsystem
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • Three high-speed USB 2.0 dual-role devices
  • Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC™/SD®/SDIO)
  • PCI-Express® 3.0 subsystems with two 5-Gbps lanes
    • One 2-lane gen2-compliant port
    • or Two 1-lane gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • Up to 247 General-Purpose I/O (GPIO) pins
  • Real-Time Clock SubSystem (RTCSS)
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG® lock
    • Secure keys
    • Secure ROM and boot
  • Power, Reset, and Clock Management (PRCM)
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-pin BGA (ABC)
  • Architecture designed for infotainment applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
    • 2D and 3D graphics
  • Dual Arm® Cortex®-A15 microprocessor subsystem
  • Up to two C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 x 16-Bit fixed-point multiplies per cycle
  • Up to 2.5MB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
    • Supports up to DDR2-800 and DDR3-1066
    • Up to 2GB supported per EMIF
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • Up to two Embedded Vision Engines (EVEs)
  • IVA subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • Video Processing Engine (VPE)
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Dual-core PowerVR® SGX544 3D GPU
  • Three Video Input Port (VIP) modules
    • Support for up to 10 multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-port gigabit ethernet (GMAC)
  • Sixteen 32-Bit general-purpose timers
  • 32-Bit MPU watchdog timer
  • Five Inter-Integrated Circuit (I2C™) ports
  • HDQ™/1-Wire® interface
  • SATA interface
  • MediaLB® (MLB) subsystem
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • Three high-speed USB 2.0 dual-role devices
  • Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC™/SD®/SDIO)
  • PCI-Express® 3.0 subsystems with two 5-Gbps lanes
    • One 2-lane gen2-compliant port
    • or Two 1-lane gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • Up to 247 General-Purpose I/O (GPIO) pins
  • Real-Time Clock SubSystem (RTCSS)
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG® lock
    • Secure keys
    • Secure ROM and boot
  • Power, Reset, and Clock Management (PRCM)
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-pin BGA (ABC)

DRA75x and DRA74x (Jacinto 6) infotainment applications processors are built to meet the intense processing needs of the modern infotainment-enabled automobile experiences.

The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by dual-core Arm® Cortex®-A15 RISC CPUs with Arm® Neon™ extension, TI C66x VLIW floating-point DSP core, and Vision AccelerationPac (with one or more EVEs). The Arm allows developers to keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers and a debugging interface for visibility into source code.

The DRA75x and DRA74x Jacinto 6 processor family is qualified according to the AEC-Q100 standard.

DRA75x and DRA74x (Jacinto 6) infotainment applications processors are built to meet the intense processing needs of the modern infotainment-enabled automobile experiences.

The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by dual-core Arm® Cortex®-A15 RISC CPUs with Arm® Neon™ extension, TI C66x VLIW floating-point DSP core, and Vision AccelerationPac (with one or more EVEs). The Arm allows developers to keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers and a debugging interface for visibility into source code.

The DRA75x and DRA74x Jacinto 6 processor family is qualified according to the AEC-Q100 standard.

Download

More Information

For more information on the DRA744  Request Now

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 46
Type Title Date
* Data sheet DRA75x, DRA74x Infotainment Applications Processor Silicon Revision 2.0 datasheet (Rev. F) PDF | HTML 07 May 2019
* Errata DRA75x, DRA74x Silicon Errata Automotive Infotainment Silicon Revision 2.0, 1.1 (Rev. J) PDF | HTML 08 Jan 2021
Application note Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 05 May 2021
Application note IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 24 Aug 2020
User guide DRA75x, DRA74x Technical Reference Manual (SR2.0 & SR1.1) (Rev. G) 21 Feb 2020
Application note AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 06 Jan 2020
Application note Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 11 Jun 2019
Application note Achieving Early CAN Response on DRA7xx Devices 28 Nov 2018
Application note DRA74x_75x/DRA72x Performance (Rev. A) 31 Oct 2018
Application note Audio Post Processing Engine on Jacinto™ DRA7x Family of Devices 14 Sep 2018
Application note The Implementation of YUV422 Output for SRV 02 Aug 2018
Application note MMC DLL Tuning (Rev. B) 31 Jul 2018
Application note Integrating AUTOSAR on TI SoC: Fundamentals 18 Jun 2018
Application note ECC/EDC on TDAxx (Rev. B) 13 Jun 2018
Application note Tools and Techniques to Root Case Failures in Video Capture Subsystem 12 Jun 2018
Application note Sharing VPE Between VISIONSDK and PSDKLA 04 May 2018
Application note Android Boot Optimization on DRA7xx Devices (Rev. A) 13 Feb 2018
Application note Flashing Utility - mflash 09 Jan 2018
Application note Using Peripheral Boot and DFU for Rapid Development on Jacinto 6 Devices (Rev. A) 30 Nov 2017
Application note Jacinto6 Spread Spectrum Clocking Configuration (Rev. A) 27 Nov 2017
Application note Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 07 Nov 2017
Application note A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 03 Nov 2017
Application note Robust Rear-View Camera (RVC) App Report 13 Sep 2017
Application note Optimization of GPU-Based Surround View on TI’s TDA2x SoC 12 Sep 2017
Application note Using DSS Write-Back Pipeline for RGB-to-YUV Conversion on DRA7xx Devices 14 Aug 2017
Application note Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices 12 Jul 2017
White paper Revolutionize the automotive cockpit 02 Jun 2017
Application note Linux Boot Time Optimizations on DRA7xx Devices 31 Mar 2017
Application note Interfacing DRA75x and DRA74x Audio to Analog Codecs (Rev. A) 17 Feb 2017
Application note Early Splash Screen on DRA7x Devices 31 Jan 2017
Application note Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 15 Dec 2016
Application note Gstreamer Migration Guidelines 26 Apr 2016
User guide Jacinto6 Android Video Decoder Software Design Specification User's Guide 21 Apr 2016
User guide Jacinto6 Android Video Encoder Software Design Specification User's Guide 21 Apr 2016
Application note Flashing Binaries to DRA7xx Factory Boards Using DFU 14 Apr 2016
Application note Tools and Techniques for Audio Debugging 13 Apr 2016
Application note Debugging Tools and Techniques With IPC3.x 30 Mar 2016
Technical article Infotainment for the Masses – Volkswagen MIB II Standard powered by TI 17 Feb 2016
EVM User's guide DRA75x and DRA74x EVM CPU Board User's Guide 09 Feb 2016
User guide JAMR3 Tuner Application Board User’s Guide 09 Feb 2016
Application note Modifying Memory Usage for IPUMM Applications Loaded IPC 3.x for DRA75x, DRA74x (Rev. A) 15 Jan 2016
Technical article Difficult to see. Always in motion is the future 04 Jan 2016
Technical article Securing the Scene 16 Dec 2015
Technical article Announcing the new entry-level Sitara processor 09 Dec 2015
White paper Informational ADAS as Software Upgrade to Today’s Infotainment Systems 14 Oct 2014
Application note Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 13 Aug 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

J6EVM5777 — DRA7xx Evaluation Module

The Jacinto™ DRA7xx evaluation module platform designed to speed up development efforts and reduce time to market for applications such as infotainment, reconfigurable digital cluster or integrated digital cockpit. To allow scalability and re-use across DRA74x and DRA75x Jacinto (...)

User guide: PDF
Evaluation board

J6PEVM577P — DRA7xP Evaluation Module

The DRA77xP/DRA76xP-ACD is an evaluation platform designed to allow scalability and re-use across DRA77xP and DRA76xP JacintoTM Infotainment System-on-Chips (SoCs), it is based on Jacinto DRA77xP SoC that incorporates a heterogeneous, scalable architecture that includes a mix of two ARM Cortex-A15 (...)

User guide: PDF
Software development kit (SDK)

PROCESSOR-SDK-DRA7X — Processor Software Development Kit for DRA7x Jacinto™ Processors – Linux, Android, and RTOS

Processor SDK Linux Automotive

Processor SDK Linux Automotive is the foundational software development platform for TI's Jacinto™ DRAx family of Infotainment SoCs. The software framework allows users to develop feature-rich Infotainment solutions such as reconfigurable digital instrument (...)

Firmware

VCTR-3P-AUTOSAR — Vector AUTOSAR, HSM, and networking software components for the automotive industry

Vector is the leading manufacturer of software tools and embedded components for the development of electronic systems and networking from CAN to Automotive Ethernet. Vector has been a partner of automotive manufacturers, suppliers and related industries since 1988, providing software components, (...)
IDE, configuration, compiler or debugger

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It comprises a suite of tools used to develop and debug embedded applications.  Code Composer Studio is available for download across Windows®, Linux® and macOS® (...)

Supported products & hardware

Supported products & hardware

This design resource supports most products in these categories.

Check the product details page to verify support.

Products
Automotive mmWave radar sensors
AWR1243 76-GHz to 81-GHz high-performance automotive MMIC AWR1443 Single-chip 76-GHz to 81-GHz automotive radar sensor integrating MCU and hardware accelerator AWR1642 Single-chip 76-GHz to 81-GHz automotive radar sensor integrating DSP and MCU AWR1843 Single-chip 76-GHz to 81-GHz automotive radar sensor integrating DSP, MCU and radar accelerator AWR1843AOP Single-chip 76-GHz to 81-GHz automotive radar sensor integrating antenna on package, DSP and MCU AWR2243 76-GHz to 81-GHz automotive second-generation high-performance MMIC AWR2944 Automotive 2nd-generation, 76-GHz to 81-GHz, high-performance SoC for corner and long-range radar AWR6443 Single-chip 60-GHz to 64-GHz automotive radar sensor integrating MCU and radar accelerator AWR6843 Single-chip 60-GHz to 64-GHz automotive radar sensor integrating DSP, MCU and radar accelerator AWR6843AOP Single-chip 60-GHz to 64-GHz automotive radar sensor integrating antenna on package, DSP and MCU
Industrial mmWave radar sensors
IWR1443 Single-chip 76-GHz to 81-GHz mmWave sensor integrating MCU and hardware accelerator IWR1642 Single-chip 76-GHz to 81-GHz mmWave sensor integrating DSP and MCU IWR1843 Single-chip 76-GHz to 81-GHz industrial radar sensor integrating DSP, MCU and radar accelerator IWR6443 Single-chip 60-GHz to 64-GHz intelligent mmWave sensor integrating MCU and hardware accelerator IWR6843 Single-chip 60-GHz to 64-GHz intelligent mmWave sensor integrating processing capability IWR6843AOP Single-chip 60-GHz to 64-GHz intelligent mmWave sensor with integrated antenna on package (AoP)
Evaluate in the cloud Download options
Operating system (OS)

GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
Simulation model

DRA75x and DRA74x BSDL Model

SPRM667.ZIP (14 KB) - BSDL Model
Simulation model

DRA75x and DRA74x IBIS Model

SPRM668.ZIP (18366 KB) - IBIS Model
Simulation model

DRA75x and DRA74x Thermal Model

SPRM669.ZIP (2 KB) - Thermal Model
Calculation tool

CLOCKTREETOOL — Clock Tree Tool for Sitara, Automotive, Vision Analytics, & Digital Signal Processors

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree (...)
User guide: PDF
Design tool

PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Package Pins Download
FCBGA (ABC) 760 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos