Product details


Arm CPU 2 Arm Cortex-A72 Arm MHz (Max.) 2000 Co-processor(s) 4 Arm Cortex-R5F, MCU Island: 1 Dual Arm Cortex-R5 CPU 64-bit Graphics acceleration 1 3D Display type 2 DPI, 1 DSI, 1 EDP Protocols Ethernet Ethernet MAC 8-port 2.5Gb switch PCIe 4 PCIe Gen3 Hardware accelerators 1 Deep Learning accelerator, 1 Video Encode/Decode accelerator Features Networking Security Debug security, Secure boot & storage & programming, Cryptographic acceleration, Trusted execution environment, Software IP protection, Device identity, Isolation firewalls Rating Catalog Operating temperature range (C) -40 to 125 open-in-new Find other Arm-based processors

Package | Pins | Size

FCBGA (ALF) 827 open-in-new Find other Arm-based processors


Processor cores:

  • Dual 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0 GHz, 24K DMIPS
    • 1MB shared L2 cache per dual-core Arm Cortex-A72 cluster
    • 32KB L1 DCache and 48KB L1 ICache per Cortex-A72 Core
  • Six Arm Cortex-R5F MCUs at up to 1.0 GHz, 8K DMIPS
    • 16K I-Cache, 16K D-Cache, 64K L2 TCM
    • Two Arm Cortex-R5F MCUs in isolated MCU subsystem
    • Four Arm Cortex-R5F MCUs in general compute partition
  • Deep-learning Matrix Multiply Accelerator (MMA), up to 8 TOPS (8b) at 1.0 GHz
  • C7x floating point, vector DSP, up to 1.0 GHz, 80 GFLOPS, 256 GOPS
  • Two C66x floating point DSP, up to 1.35 GHz, 40 GFLOPS, 160 GOPS
  • 3D GPU PowerVR Rogue 8XE GE8430, up to 750 MHz, 96 GFLOPS, 6 Gpix/sec

    Memory subsystem:

  • Up to 8MB of on-chip L3 RAM with ECC and coherency
    • ECC error protection
    • Shared coherent cache
    • Supports internal DMA engine
  • External Memory Interface (EMIF) module with ECC
    • Supports LPDDR4 memory types
    • Supports speeds up to 4266 MT/s
    • 32-bit data bus with inline ECC up to 14.9GB/s
  • General-Purpose Memory Controller (GPMC)
  • 512KB on-chip SRAM in MAIN domain, protected by ECC

    Display subsystem:

  • One eDP/DP interface with Multi-Display Support (MST)
    • HDCP1.4/HDCP2.2 high-bandwidth digital content protection
  • One DSI TX (up to 2.5K)
  • Up to two DPI

    Video acceleration:

  • Ultra-HD video, one (3840 × 2160p, 60 fps), or two (3840 × 2160p, 30 fps) H.264/H.265 decode
  • Full-HD video, four (1920 × 1080p, 60 fps), or eight (1920 × 1080p, 30 fps) H.264/H.265 decode
  • Full-HD video, one (1920 × 1080p, 60 fps), or up to three (1920 × 1080p, 30 fps) H.264 encode

    Functional Safety:

  • Functional Safety-Compliant targeted (on select part numbers)
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 functional safety system design up to ASIL-D/SIL-3 targeted
    • Systematic capability up to ASIL-D/SIL-3 targeted
    • Hardware integrity up to ASIL-D/SIL-3 targeted for MCU Domain
    • Hardware integrity up to ASIL-B/SIL-2 targeted for Main Domain
    • Safety-related certification
      • ISO 26262 planned
  • AEC-Q100 qualified on part number variants ending in Q1
  • Device security (on select part numbers):

  • Secure boot with secure runtime support
  • Customer programmable root key, up to RSA-4K or ECC-512
  • Embedded hardware security module
  • Crypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DES

    High speed serial interfaces:

  • Two CSI2.0 4L RX plus one CSI2.0 4L TX
  • Integrated ethernet switch supporting (total of 8 external ports)
    • Up to eight 2.5Gb SGMII
    • Up to eight RMII (10/100) or RGMII (10/100/1000)
    • Up to two QSGMII
  • Up to four PCI-Express (PCIe) Gen3 controllers
    • Gen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiation
    • Up to two lanes per controller
  • Two USB 3.0 dual-role device (DRD) subsystem
    • Two enhanced SuperSpeed Gen1 ports
    • Each port supports Type-C switching
    • Each port independently configurable as USB host, USB peripheral, or USB DRD

    Automotive interfaces:

  • Sixteen Modular Controller Area Network (MCAN) modules with full CAN-FD support

    Audio interfaces:

  • Twelve Multichannel Audio Serial Port (MCASP) modules

    Flash memory interfaces:

  • Embedded MultiMediaCard interface ( eMMC™ 5.1)
  • Universal Flash Storage (UFS 2.1) interface with two lanes
  • Two Secure Digital 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)
  • Two simultaneous flash interfaces configured as
    • One OSPI and one QSPI flash interfaces
    • or one HyperBus™ and one QSPI flash interface

    System-on-Chip (SoC) architecture:

  • 16-nm FinFET technology
  • 24 mm × 24 mm, 0.8-mm pitch, 827-pin FCBGA (ALF), enables IPC class 3 PCB routing

    TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety support up to ASIL-D
  • Flexible mapping to support different use cases
open-in-new Find other Arm-based processors


Jacinto™ 7 DRA829 processors, based on the Arm®v8 64-bit architecture, provide advanced system integration to enable lower system costs of automotive and industrial applications. The integrated diagnostics and functional safety features are targeted to ASIL-B/C or SIL-2 certification/requirements. The integrated microcontroller (MCU) island eliminates the need for an external system MCU. The device features a Gigabit Ethernet switch and a PCIe hub which enables networking use cases that require heavy data bandwidth. Up to four Arm Cortex-R5F subsystems manage low level, timing critical processing tasks leaving the Arm Cortex-A72’s unencumbered for applications. A dual-core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor.

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Request samples

Preproduction samples are available (XDRA829JXXGALF). Request now

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Similar functionality to the compared device.
NEW DRA821U PREVIEW Dual Arm Cortex-A72, quad Cortex-R5F, 4-port Ethernet switch, and a PCIe controller Cut-down, optimized device for gateway/networking applications
DRA829V PREVIEW Dual Arm® Cortex®-A72, quad Cortex®-R5F, 8-port Ethernet and 4-port PCIe switches Pin-to-pin compatible device removing the GPU and DSP
TDA4VM PREVIEW Next generation SoC family for L2/L3, near-field analytic systems using deep learning technologies Pin-to-pin compatible device if VPAC/DMPAC is needed

Technical documentation

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Type Title Date
* Data sheet DRA829 Jacinto™ Processors Silicon Revisions 1.0 and 1.1 datasheet (Rev. I) Jul. 21, 2021
* Errata J721E DRA829/TDA4VM Processors Silicon Revision 1.1/1.0 Dec. 18, 2020
* User guide DRA829/TDA4VM/AM752x Technical Reference Manual (Rev. B) Jan. 18, 2021
Functional safety information TÜV SÜD Certificate for Functional Safety Software Development Process (Rev. A) Jul. 21, 2021
White paper Jacinto™ 7 프로세서의 보안 구현 도구 Jan. 04, 2021
White paper Security Enablers on Jacinto™ 7 Processors Jan. 04, 2021
White paper Sicherheitsaktivierung auf Jacinto™ 7-Prozessoren Jan. 04, 2021
White paper Differenzierungsmöglichkeit durch MCU-Integration Prozessoren der Reihe Jacinto™ Oct. 22, 2020
White paper Enabling Differentiation through MCU Integration on Jacinto™ 7 Processors Oct. 22, 2020
White paper Jacinto™ 7 프로세서의 MCU 통합으로 차별화 지원 Oct. 22, 2020
White paper Evolving automotive gateways for next-generation vehicles (Rev. B) Oct. 09, 2020
White paper 為下一代車輛開發的汽車閘道 (Rev. B) Oct. 09, 2020
White paper 차세대 자동차를 위한 진화하는 차량용 게이트웨이 (Rev. B) Oct. 09, 2020
Application note MMC SW Tuning Algorithm Aug. 18, 2020
Application note OSPI Tuning Procedure Jul. 08, 2020
Application note Jacinto 7 LPDDR4 Board Design and Layout Guidelines (Rev. A) Apr. 23, 2020
White paper 運用 Jacinto™ 7 處理器的汽車設計功能安全特性 Mar. 01, 2020
White paper 오토모티브 설계 시 Jacinto™ 7 프로세서의 기능적 안전성 활용하기 Mar. 01, 2020
White paper Leverage Jacinto 7 Processors Functional Safety Features for Automotive Designs Dec. 12, 2019
More literature Jacinto 7 EVM Quick Start Guide for TDA4VM and DRA829V Processors Oct. 10, 2019
Application note Jacinto 7 High-Speed Interface Layout Guidelines Oct. 04, 2019
User guide User's Guide for Powering DRA829V and TDA4VM with the TPS6594-Q1 PMICs Jul. 09, 2019
Technical article Bringing the next evolution of machine learning to the edge Nov. 27, 2018
Technical article Industry 4.0 spelled backward makes no sense – and neither does the fact that you haven’t heard of TI’s newest processor yet Oct. 30, 2018
Technical article How quality assurance on the Processor SDK can improve software scalability Aug. 22, 2018
Technical article Clove: Low-Power video solutions based on Sitara™ AM57x processors Jul. 21, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The J721EXCP01EVM common processor board for Jacinto™ 7 processors lets you evaluate vision analytics and networking applications in automotive and industrial markets. The common processor board is compatible with all Jacinto 7 processors system-on-modules (sold separately or as a (...)

  • UFS flash memory, 32GByte, 2Lane, Gear3
  • USB3.1 type C interface, support DFP, DRP, UFP modes
  • Display port, up to 4K resolution with MST support
  • 2x PCIe card slot, 1x PCIe M.2 slot (M‐Key), all Gen3
document-generic User guide

The J721EXSOMG01EVM system-on-module—when paired with the J721EXPCP01EVM common processor board—lets you evaluate TDA4VM and DRA829V processors in vision analytics and networking applications throughout automotive and industrial markets. These processors perform (...)

  • TDA4VM/DRA829V (J721 E) processor
  • Optimized power solution (PMIC)
  • DRAM, LPDDR4‐3733, 4GByte total memory, support inline ECC
  • Octal‐SPI NOR flash, 512Mb memory (8bit)
  • HyperFlash + HyerRAM, 512Mb flash memory + 256Mb RAM
document-generic User guide

Expand the capabilities of the J721EXCP01EVM common processor board for evaluating Jacinto 7 processors in vision analytics and networking applications in automotive and industrial markets with our Gateway/Ethernet switch expansion card.

  • Ethernet
    • 4x 10/100/1000Mbps - RGMII ports (DP83867E)
    • 1x 10/100Mbps - RMII port (DP83822I)
  • 6x CAN interface
  • 6x LIN interface
  • PROFI BUS/RS485 port (DB9)
  • USS/IMU sensor header
  • Motor control header
  • Booster pack interface header
  • Board ID EEPROM
document-generic User guide
Expand the capabilities of the J721EXCP01EVM common processor board for evaluating Jacinto 7 processors in vision analytics and networking applications in automotive and industrial markets with our audio and display expansion card.
  • Audio interfaces:
    • Two Audio codecs each with three Stereo Inputs and four Stereo Outputs
    • Audio input over FPD Link III
    • Digital Audio Interface Transmit
    • Digital Audio Interface Receiver
  • Video interfaces:
    • HDMI/FPD LINK III Display out
    • LI/OV Camera input
  • JAMR3 interface
  • Board ID EEPROM

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)


XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

Software development

Software Development Kit for DRA829 & TDA4VM Jacinto™ processors
PROCESSOR-SDK-J721E Processor SDK RTOS (PSDK RTOS) can be used together with either Processor SDK Linux (PSDK Linux) or Processor SDK QNX (PSDK QNX) to form a multi-processor software development platform for TDA4VM and DRA829 SoCs within TI’s Jacinto™ platform. The SDK provides a comprehensive (...)
  • Detailed feature lists for each SDK can be found in the respective release notes links found on the SDK download pages
Code Composer Studio™ integrated development environment (IDE)
CCSTUDIO — Code Composer Studio؜™ software is an integrated development environment (IDE) that supports TI's microcontroller (MCU) and embedded processor portfolios. Code Composer Studio software comprises a suite of tools used to develop and debug embedded applications. The software includes an (...)
Provided by Green Hills Software — The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)

Design tools & simulation

SPRM751.ZIP (14 KB) - BSDL Model
SPRM752.ZIP (1983 KB) - IBIS Model
SPRM753.ZIP (1 KB) - Thermal Model
Clock Tree Tool for Sitara, Automotive, Vision Analytics, & Digital Signal Processors
CLOCKTREETOOL The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree elements (...)
document-generic User guide
Pin mux tool
PINMUXTOOL The PinMux Utility is a software tool which provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI MPUs. Results are output as C header/code files that can be imported into software development kits (SDKs) or (...)
Arm-based MPU, arm-based MCU and DSP third-party search tool
PROCESSORS-3P-SEARCH TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
  • Supports many TI processors including Sitara and Jacinto processors and DSPs
  • Search by type of product, TI devices supported, or country
  • Links and contacts for quick engagement
  • Third-party companies located around the world

CAD/CAE symbols

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FCBGA (ALF) 827 View options

Ordering & quality

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  • Device marking
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  • MSL rating/Peak reflow
  • MTBF/FIT estimates
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  • Qualification summary
  • Ongoing reliability monitoring

Support & training

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