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Product details

Parameters

Number of transmitters 0 Number of receivers 4 Duplex Half Supply voltage (Nom) (V) 3.3 Signaling rate (Max) (Mbps) 10 IEC 61000-4-2 contact (+/- kV) None Isolated No Fault protection (V) -14 to 14 Number of nodes 32 Common mode range -7 to 7 ICC (Max) (mA) 15 Rating Catalog Operating temperature range (C) -40 to 85 Number of TX 0 Number of RX 4 open-in-new Find other RS-485 & RS-422 transceivers

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 open-in-new Find other RS-485 & RS-422 transceivers

Features

  • Low Power CMOS Design (30 mW typical)
  • Interoperable with Existing 5V RS-422 Networks
  • Industrial and Military Temperature Range
  • Conforms to TIA/EIA-422-B (RS-422) and ITU-T V.11 Recommendation
  • 3.3V Operation
  • ±7V Common Mode Range @ VID = 3V
  • ±10V Common Mode Range @ VID = 0.2V
  • Receiver OPEN Input Failsafe Feature
  • Guaranteed AC Parameter:
    •  Maximum Receiver Skew: 4 ns
    •  Maximum Transition Time: 10 ns
  • Pin Compatible with DS26C32AT
  • 32 MHz Toggle Frequency
  • > 6.5k ESD Tolerance (HBM)
  • Available in SOIC and CLGA Packaging
  • Standard Microcircuit Drawing (SMD) 5962-98585

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Description

The DS26LV32A is a high speed quad differential CMOS receiver that meets the requirements of both TIA/EIA-422-B and ITU-T V.11. The CMOS DS26LV32AT features typical low static ICC of 9 mA which makes it ideal for battery powered and power conscious applications. The TRI-STATE enables, EN and EN*, allow the device to be active High or active Low. The enables are common to all four receivers.

The receiver output (RO) is guaranteed to be High when the inputs are left open. The receiver can detect signals as low as ±200 mV over the common mode range of ±10V. The receiver outputs (RO) are compatible with TTL and LVCMOS levels.

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Technical documentation

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Type Title Date
* Datasheet DS26LV32AT 3V Enhanced CMOS Quad Differential Line Receiver datasheet (Rev. C) Feb. 19, 2013
Application notes AN-903 A Comparison of Differential Termination Techniques (Rev. B) Apr. 26, 2013

Design & development

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SOIC (D) 16 View options

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