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Product details

Parameters

Function Serializer Input compatibility LVCMOS, LVTTL Output compatibility LVDS Rating Catalog Operating temperature range (C) -10 to 70 open-in-new Find other Display SerDes

Package | Pins | Size

TSSOP (DGG) 56 113 mm² 14 x 8.1 open-in-new Find other Display SerDes

Features

  • 20 to 85 MHz Shift Clock Support
  • 50% Duty Cycle on Receiver Output Clock
  • 2.5 / 0 ns Set & Hold Times on TxINPUTs
  • Low Power Consumption
  • ±1V Common-Mode Range (around +1.2V)
  • Narrow Bus Reduces Cable Size and Cost
  • Up to 2.38 Gbps Throughput
  • Up to 297.5 Mbytes/sec Bandwidth
  • 345 mV (typ) Swing LVDS Devices for Low EMI
  • PLL Requires no External Components
  • Rising Edge Data Strobe
  • Compatible with TIA/EIA-644 LVDS Standard
  • Low Profile 56-Lead TSSOP Package

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Description

The DS90CR287 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted.

The DS90CR288A receiver converts the four LVDS data streams back into 28 bits of LVCMOS/LVTTL data. At a transmit clock frequency of 85 MHz, 28 bits of TTL data are transmitted at a rate of 595 Mbps per LVDS data channel. Using a 85 MHz clock, the data throughput is 2.38 Gbit/s (297.5 Mbytes/sec).

This chipset is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 9
Type Title Date
* Datasheet DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link 85MHz datasheet (Rev. G) Mar. 05, 2013
Technical articles How to choose a power supply for an automotive camera module Sep. 17, 2020
Application notes High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs Nov. 09, 2018
Application notes Receiver Skew Margin for Channel Link I and FPD Link I Devices Jan. 13, 2016
Application notes Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des (Rev. A) Apr. 26, 2013
User guides 28-Bit Channel Link SerDes Evaluation Board 20-85MHz User Guide Jan. 25, 2012
User guides Channel Link I Design Guide Mar. 29, 2007
Application notes Multi-Drop Channel-Link Operation Oct. 04, 2004
Application notes CHANNEL LINK Moving and Shaping Information In Point-To-Point Applications Oct. 05, 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
499
Description

The FPD-Link evaluation kit includes a transmitter (Tx) board, a receiver (Rx) board and interfacing cables. This kit shows the chipsets interfacing from test equipment or a graphics controller using low-voltage differential signaling (LVDS) to a receiver board.

The transmitter board accepts (...)

Design tools & simulation

SIMULATION MODELS Download
SNLM210.ZIP (6 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
NFBGA (NZC) 64 View options
TSSOP (DGG) 56 View options

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