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SOIC (DW) 16
  • 2.5-A maximum peak output current
  • Drives IGBTs up to IC = 150 A, VCE = 600 V
  • Capacitive isolated fault feedback
  • CMOS/TTL compatible inputs
  • 300-ns maximum propagation delay
  • Soft IGBT turnoff
  • Integrated fail-safe IGBT protection
    • High VCE (DESAT) detection
    • Undervoltage lockout (UVLO) protection with hysteresis
  • User configurable functions
    • Inverting, non-inverting inputs
    • Auto-reset
    • Auto-shutdown
  • Wide VCC1 range: 3 V to 5.5 V
  • Wide VCC2 range: 15 V to 30 V
  • Operating temperature: –40°C to 125°C
  • Wide-body SO-16 package
  • ±50-kV/us transient immunity typical
  • Safety and Regulatory Approvals:
    • VDE 4000 VPK Basic Isolation per DIN V VDE V 0884-11
    • 2500 VRMS Isolation for One Minute per UL 1577
    • CSA 62368-1:19, CSA 61010-1-12, UPD1: 2015, UPD2:2016, AMD1:2018
  • 2.5-A maximum peak output current
  • Drives IGBTs up to IC = 150 A, VCE = 600 V
  • Capacitive isolated fault feedback
  • CMOS/TTL compatible inputs
  • 300-ns maximum propagation delay
  • Soft IGBT turnoff
  • Integrated fail-safe IGBT protection
    • High VCE (DESAT) detection
    • Undervoltage lockout (UVLO) protection with hysteresis
  • User configurable functions
    • Inverting, non-inverting inputs
    • Auto-reset
    • Auto-shutdown
  • Wide VCC1 range: 3 V to 5.5 V
  • Wide VCC2 range: 15 V to 30 V
  • Operating temperature: –40°C to 125°C
  • Wide-body SO-16 package
  • ±50-kV/us transient immunity typical
  • Safety and Regulatory Approvals:
    • VDE 4000 VPK Basic Isolation per DIN V VDE V 0884-11
    • 2500 VRMS Isolation for One Minute per UL 1577
    • CSA 62368-1:19, CSA 61010-1-12, UPD1: 2015, UPD2:2016, AMD1:2018

The ISO5500 is an isolated gate driver for IGBTs and MOSFETs with power ratings of up to IC = 150 A and VCE = 600 V. Input TTL logic and output power stage are separated by a capacitive, silicon dioxide (SiO2), isolation barrier. When used in conjunction with isolated power supplies, the device blocks high voltage, isolates ground, and prevents noise currents from entering the local ground and interfering with or damaging sensitive circuitry.

The device provides over-current protection (DESAT) to an IGBT or MOSFET while an Undervoltage Lockout circuit (UVLO) monitors the output power supply to ensure sufficient gate drive voltage. If the output supply drops below 12 V, the UVLO turns the power transistor off by driving the gate drive output to a logic low state.

For a DESAT fault, the ISO5500 initiates a soft shutdown procedure that slowly reduces the IGBT/MOSFET current to zero while preventing large di/dt induced voltage spikes. A fault signal is then transmitted across the isolation barrier, actively driving the open-drain FAULT output low and disabling the device inputs. The inputs are blocked as long as the FAULT-pin is low. FAULT remains low until the inputs are configured for an output low state, followed by a logic low input on the RESET pin.

The ISO5500 is available in a 16-pin SOIC package and is specified for operating temperatures from –40°C to 125°C.

The ISO5500 is an isolated gate driver for IGBTs and MOSFETs with power ratings of up to IC = 150 A and VCE = 600 V. Input TTL logic and output power stage are separated by a capacitive, silicon dioxide (SiO2), isolation barrier. When used in conjunction with isolated power supplies, the device blocks high voltage, isolates ground, and prevents noise currents from entering the local ground and interfering with or damaging sensitive circuitry.

The device provides over-current protection (DESAT) to an IGBT or MOSFET while an Undervoltage Lockout circuit (UVLO) monitors the output power supply to ensure sufficient gate drive voltage. If the output supply drops below 12 V, the UVLO turns the power transistor off by driving the gate drive output to a logic low state.

For a DESAT fault, the ISO5500 initiates a soft shutdown procedure that slowly reduces the IGBT/MOSFET current to zero while preventing large di/dt induced voltage spikes. A fault signal is then transmitted across the isolation barrier, actively driving the open-drain FAULT output low and disabling the device inputs. The inputs are blocked as long as the FAULT-pin is low. FAULT remains low until the inputs are configured for an output low state, followed by a logic low input on the RESET pin.

The ISO5500 is available in a 16-pin SOIC package and is specified for operating temperatures from –40°C to 125°C.

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Technical documentation

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Type Title Date
* Data sheet ISO5500 2.5-A Isolated IGBT, MOSFET Gate Driver datasheet (Rev. E) PDF | HTML 21 Apr 2022
Certificate VDE Certificate for Basic Isolation for DIN VDE V 0884-11:2017-01 (Rev. S) 03 Aug 2021
Certificate CSA Certification (Rev. Q) 14 Jun 2021
Certificate UL Certification (Rev. O) 03 Feb 2021
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
White paper Power Electronics in Motor Drives: Where is it? (Rev. A) 01 Oct 2019
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018
User guide ISO5500EVM User's Manual (Rev. A) 06 Nov 2012

Design & development

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Evaluation board

ISO5500EVM — ISO5500EVM: Isolated IGBT/MOSFET Gate Driver Evaluation Module

The ISO5500EVM can be used to evaluate device parameters while acting as a guide for board layout. The board allows the user to evaluate device performance using a simulated (10 nF) IGBT load installed on the board, or to install an IGBT or MOSFET (TO-247 package)onto the board and drive it with (...)

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PSPICE-FOR-TI PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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