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Product details

Parameters

Function Ultra-low jitter clock generator Number of outputs 14 Output frequency (Max) (MHz) 2600 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type XTAL, LVCMOS, LVDS, LVPECL Output type LVCMOS, LVDS, LVPECL Operating temperature range (C) -40 to 85 Features uWire Rating Catalog open-in-new Find other Clock generators

Package | Pins | Size

WQFN (NKD) 64 81 mm² 9 x 9 open-in-new Find other Clock generators

Features

  • High Performance, Ultra Low Jitter Clock Generator
  • Low Jitter
    • < 50-fs Jitter (1.875 MHz – 20 MHz) at 312.5-MHz Output Frequency
    • < 150-fs Jitter (12 kHz – 20 MHz) at 312.5-MHz Output Frequency
  • Generates Multiple Clocks from a Low-Cost Crystal or External Clock.
  • 14 Outputs With Programmable Output Format (LVDS, LVPECL, CMOS)
  • Up to 8 Unique Output Frequencies.
  • Industrial Temperature Range: –40 to 85 °C
  • Tunable VCO Frequency from 2.37 – 2.6 GHz
  • Programmable Dividers to Generate Multiple Clocks from a Low Cost Crystal.
  • 3.15-V to 3.45-V Operation
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Description

The LMK03806 device is a high-performance, ultra low-jitter, multi-rate clock generator capable of synthesizing 8 different frequencies on 14 outputs at frequencies of up to 2.6 GHz. Each output clock is programmable in LVDS, LVPECL or LVCMOS format. The LMK03806 integrates a high-performance integer-N PLL, low-noise VCO, and programmable output dividers to generate multiple reference clocks for SONET, Ethernet, Fiber Channel, XAUI, Backplane, PCIe, SATA, and Network Processors from a low-cost crystal.

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Technical documentation

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Type Title Date
* Data sheet LMK03806 Ultra Low Jitter Clock Generator With 14 Programmable Outputs datasheet (Rev. J) Mar. 16, 2018
Selection guide TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017
Technical article How to select an optimal clocking solution for your FPGA-based design Dec. 09, 2015
Technical article Clocking sampled systems to minimize jitter Jul. 31, 2014
Application note Crystal or Crystal Oscillator Replacement with Silicon Devices Jun. 18, 2014
Technical article Timing is Everything: How to optimize clock distribution in PCIe applications Mar. 28, 2014
User guide LMK03806B Evaluation Board User Guide (Rev. A) Nov. 26, 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
299
Description

The LMK03806 Evaluation Board allows functional and performance verification of the LMK03806 ultra-low jitter clock generator.

Features
  • Low-jitter clock generation via 14 differential outputs
  • Selectable differential output type (LVPECL, LVDS, LVCMOS), selectable per clock output pair via uWire control
  • Crystal oscillator interface and buffered oscillator outputs
  • Single 3.3 V operation using onboard regulator options or direct supply (...)

Software development

APPLICATION SOFTWARE & FRAMEWORK Download
Clock Design Tool - Loop Filter & Device Configuration + Simulation
CLOCKDESIGNTOOL The Clock Design Tool software helps with part selection, loop filter design and simulation of timing device solutions. When you enter desired output frequencies and a reference frequency (optional), the tool provides TI devices to meet the specified requirements, divider values and a recommended (...)
APPLICATION SOFTWARE & FRAMEWORK Download
Texas Instruments Clocks and Synthesizers (TICS) Pro Software
TICSPRO-SW The TICS Pro software is used to program the evaluation modules (EVMs) for device numbers with these prefixes: CDC, LMK and LMX. These devices include PLLs and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.
Features
  • Program EVMs through the USB2ANY Interface Adaptor or onboard USB interface.
  • Export programming configurations for use in end application.
IDE, CONFIGURATION, COMPILER OR DEBUGGER Download
CodeLoader Software for device register programming
CODELOADER The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.


Which software do I use?

Product

Loop (...)

Design tools & simulation

SIMULATION MODEL Download
SNAM102B.ZIP (101 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
DESIGN TOOL Download
Clock tree architect programming software
CLOCK-TREE-ARCHITECT Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Features
  • Accepts customer specific design requirements such as input frequencies, output frequencies, clock formats and clock counts
  • Generates clock trees by taking into account a variety of advanced specifications, such as noise floor and phase determinism requirements
  • Presents clear and intuitive block (...)

CAD/CAE symbols

Package Pins Download
WQFN (NKD) 64 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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