Space grade 40-MHz to 15-GHz wideband synthesizer with phase synchronization and JESD204B support


Product details


Integrated VCO Yes Output frequency (Min) (MHz) 40 Output frequency (Max) (MHz) 15000 Normalized PLL phase noise (dBc/Hz) -236 Current consumption (mA) 360 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 open-in-new Find other RF PLLs & synthesizers

Package | Pins | Size

CFP (HSL) (HBD) 64 open-in-new Find other RF PLLs & synthesizers


  • Radiation specifications:
    • Single event latch-up >120 MeV-cm2/mg
    • Total ionizing dose to 100 krad(Si)
    • SMD 5962R1723601VXC
  • 40-MHz to 15.2-GHz output frequency
  • –110-dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 45 fs RMS jitter at 8 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • Up to 200-MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • 3.3-V single power supply operation
  • 71 pre-selected pin modes
  • 11 × 11 mm² 64-lead CQFP ceramic package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
open-in-new Find other RF PLLs & synthesizers


The LMX2615-SP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) and voltage regulators that can output any frequency from 40 MHz and 15.2 GHz without a doubler, which eliminates the need for ½ harmonic filters. The VCO on this device covers an entire octave so the frequency coverage is complete down to 40 MHz. The high performance PLL with a figure of merit of –236 dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2615-SP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case including the one with fractional engine or output divider enabled. It also adds support for either generating or repeating SYSREF (compliant to JESD204B standard), making it an ideal low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead CQFP ceramic package.

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Technical documentation

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Type Title Date
* Data sheet LMX2615-SP Space Grade 40-MHz to 15-GHz Wideband Synthesizer With Phase Synchronization and JESD204B Support datasheet (Rev. D) May 07, 2020
* SMD LMX2615-SP SMD 5962-17236 May 19, 2020
* Radiation & reliability report LMX2615-SP Enhanced Low Dose Rate Sensitivity (ELDRS) Characterization Radiation Aug. 30, 2019
* Radiation & reliability report Single Event Effect Report: LMX2615-SP 40MHz to 15 GHz Wideband Synthesizer Aug. 30, 2019
Application note Streamline RF Synthesizer VCO Calibration and Optimize PLL Lock Time (Rev. A) Aug. 27, 2021
Selection guide TI Space Products (Rev. H) Jan. 27, 2021
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations May 18, 2020
Technical article Why component integration carries weight for space-based PLL synthesizers Feb. 10, 2020
Application note Single-Event Effects Confidence Interval Calculations Jan. 14, 2020
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing Jun. 17, 2019
E-book Radiation Handbook for Electronics (Rev. A) May 21, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
The LMX2615EVM-CVAL evaluation module (EVM) is designed for evaluating the LMX2615-SP product. It includes the assembled PCB and uses Reference Pro to program the board and also provide a 100-MHz input reference. The board is assembled with the LMX2615W-MPR engineering sample and can be used to (...)
  • 40-MHz to 15-GHz output frequency 
  • -110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 45-fs rms jitter at 7.5 GHz (100 Hz to 100 MHz) 
  • Two differential outputs with programmable output power up to 7 dBm at 15 GHz 
  • This EVM has the complete circuit for the synthesizer, optimized and tested for (...)

Design tools & simulation

SNAM229.ZIP (45 KB) - IBIS Model
Clock tree architect programming software
CLOCK-TREE-ARCHITECT Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
  • Accepts customer specific design requirements such as input frequencies, output frequencies, clock formats and clock counts
  • Generates clock trees by taking into account a variety of advanced specifications, such as noise floor and phase determinism requirements
  • Presents clear and intuitive block (...)

CAD/CAE symbols

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CFP (HBD) 64 View options

Ordering & quality

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