Product details


Output options Adjustable Output Iout (Max) (A) 1.5 Vin (Max) (V) 5.5 Vin (Min) (V) 2.7 Vout (Max) (V) 5.1 Vout (Min) (V) 0.6 Noise (uVrms) 100 Iq (Typ) (mA) 2 Thermal resistance θJA (°C/W) 33 Load capacitance (Min) (µF) 10 Rating Catalog Regulated outputs (#) 1 Features Accuracy (%) 2 PSRR @ 100 KHz (dB) 25 Dropout voltage (Vdo) (Typ) (mV) 220 Operating temperature range (C) -40 to 125 open-in-new Find other Linear & low-dropout (LDO) regulators

Package | Pins | Size

TO-263 (KTT) 5 155 mm² 10.16 x 15.24 TO-263 (NDQ) 5 142 mm² 10.16 x 14.01 WSON (NGS) 8 8 mm² 3 x 2.5 open-in-new Find other Linear & low-dropout (LDO) regulators


  • Input Voltage: 2.7 V to 5.5 V
  • Adjustable Output Voltage: 0.6 V to 5 V
  • FlexCap: Stable with Ceramic, Tantalum, or
    Aluminum Capacitors
  • Stable with 10-µF Input and Output Capacitors
  • Low Ground-Pin Current
  • 25-nA Quiescent Current in Shutdown Mode
  • Ensured Output Current of 1.5 A
  • Ensured VADJ Accuracy of ±1.5% at 25°C (A
  • Ensured Accuracy of ±3.5% at 25°C (STD)
  • Overtemperature and Overcurrent Protection
  • ENABLE Pin (LP38502)
open-in-new Find other Linear & low-dropout (LDO) regulators


TI’s FlexCap low-dropout (LDO) linear regulators feature unique compensation that allow use of any type of output capacitor with no limits on minimum or maximum equivalent series resistance (ESR). The LP38500 and LP38502 series of LDOs operates from a 2.7-V to 5.5-V input supply. These ultra-low-dropout linear regulators respond very quickly to step changes in load, making them suitable for low-voltage microprocessor applications. Developed on a CMOS process (utilizing a PMOS pass transistor) the LP38500-ADJ and LP38502-ADJ have low quiescent currents that changes little with load current.

  • GND Pin Current: Typically 2 mA at 1.5-A load current.
  • Disable Mode: Typically 25-nA quiescent current when the EN pin is pulled low. (LP38502-ADJ)
  • Simplified Compensation: Stable with any type of output capacitor, regardless of ESR.
  • Precision Output: grade versions available with 1.5% VADJ tolerance (25°C) and 3% over line, load, and temperature.
open-in-new Find other Linear & low-dropout (LDO) regulators

Technical documentation

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Type Title Date
* Data sheet LP3850x-ADJ, LP3850xA-ADJ 1.5-A Flexcap Low-Dropout Linear Regulator for 2.7-V to 5.5-V Inputs datasheet (Rev. H) Sep. 22, 2015

Design & development

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Reference designs

Power Solution for Terasic DE0-Nano (Cyclone IV) - Reference Design
PMP10580 The PMP10580 reference design provides all the power supply rails necessary to power Altera’s Cyclone® IV FPGA.  DE0-Nano was developed by Terasic and this board is available for purchase through Terasic’s website.
document-generic Schematic
Design files

CAD/CAE symbols

Package Pins Download
DDPAK/TO-263 (KTT) 5 View options
TO-263 (NDQ) 5 View options
WSON (NGS) 8 View options

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