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Product details

Parameters

Output options Fixed Output Iout (Max) (A) 1.5 Vin (Max) (V) 5.5 Vin (Min) (V) 0.915 Vout (Max) (V) 1.5 Vout (Min) (V) 0.8 Fixed output options (V) 0.8, 1.2, 1.5 Noise (uVrms) 90 Iq (Typ) (mA) 32 Thermal resistance θJA (°C/W) 35 Load capacitance (Min) (µF) 4.7 Rating Catalog Regulated outputs (#) 1 Features Enable Accuracy (%) 2 PSRR @ 100 KHz (dB) 29 Dropout voltage (Vdo) (Typ) (mV) 115 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

TO-220 (KC) 5 86 mm² 10.2 x 8.7 TO-263 (KTT) 5 155 mm² 10.16 x 15.24 open-in-new Find other Linear regulators (LDO)

Features

  • Ideal for Conversion from 1.8V or 1.5V Inputs
  • Designed for use with low ESR Ceramic Capacitors
  • 0.8V, 1.2V and 1.5V Standard Voltages Available
  • Ultra Low Dropout Voltage (115mV at 1.5A typ)
  • 1.5% Initial Output Accuracy
  • Load Regulation of 0.1%/A (typical)
  • 30nA Quiescent Current in Shutdown (typical)
  • Low Ground Pin Current at all Loads
  • Over Temperature/Over Current Protection
  • Available in 5 Lead TO-220 and DDPAK/TO-263 Packages
  • −40°C to +125°C Junction Temperature Range

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Description

The LP38842 is a high current, fast response regulator which can maintain output voltage regulation with minimum input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: Vbias provides voltage to drive the gate of the N-MOS power transistor, while Vin is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra low Vin voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability.

The fast transient response of these devices makes them suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The parts are available in TO-220 and DDPAK/TO-263 packages.

Dropout Voltage: 115 mV (typ) at 1.5A load current.

Quiescent Current: 30 mA (typ) at full load.

Shutdown Current: 30 nA (typ) when S/D pin is low.

Precision Output Voltage: 1.5% room temperature accuracy.

open-in-new Find other Linear regulators (LDO)
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet LP38842 1.5A Ultra Low Dropout Linear Reg Stable w/Ceramic Output Cap datasheet (Rev. C) Apr. 02, 2013
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Technical articles LDO basics: noise – part 1 Jun. 14, 2017
User guides AN-1457 LP3884X-ADJ Evaluation Board (Rev. A) Apr. 24, 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
49
Description

LP38842-Adj 1.5A Ultra Low Dropout Adjustable Linear Regulators Stable with Ceramic Output Capacitors

Features
  • Ideal for conversion from 1.8V or 1.5V inputs
  • Designed for use with low ESR ceramic capacitors
  • Ultra low dropout voltage (115mV @ 1.5A typ)
  • 0.56V to 1.5V adjustable output range
  • Load regulator of 0.1%/A (typ)
  • 30nA quiescent current in shutdown (typ)
  • Low ground pin current at all loads
  • Over temperature/over (...)

Design tools & simulation

SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
DDPAK/TO-263 (KTT) 5 View options
TO-220 (KC) 5 View options

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