This octal ECL-to-TTL translator is designed to provide a efficient translation between a 10KH ECL signal environment and a TTL signal environment. This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.
Two output-enable pins, OE1 and OE2, are provided. These control inputs are ANDed together with OE1 being ECL compatible and OE2 being TTL compatible. This offers the choice of controlling the outputs of the device from either a TTL or ECL signal environment.
The SN10KHT5541 is characterized for operation from 0°C to 75°C.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | Octal ECL-to-TTL Translator With 3-State Outputs datasheet (Rev. A) | 01 Oct 1990 | |
| Selection guide | Voltage Translation Buying Guide (Rev. A) | 15 Apr 2021 |
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The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
| Package | Pins | Download |
|---|---|---|
| SOIC (DW) | 24 | View options |
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