Military 6-ch, 4.5-V to 5.5-V bipolar buffers with 3-state outputs
Product details
Parameters
Package | Pins | Size
Features
- 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
- Choice of True or Inverting Outputs
- Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
- Dependable Texas Instruments Quality and Reliability
- '365A, '367A, 'LS365A, 'LS367A True Outputs '366A, '368A, 'LS366A, 'LS368A Inverting Outputs
Description
These Hex buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The designer has choice of selected combinations of inverting and noninverting outputs, symmetrical G\ (active-low control) inputs.
These devices feature high fan-out, improved fan-in, and can be used to drive terminated lines down to 133 ohms.
The SN54365A thru SN54368A and SN54LS365A thru SN54LS368A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74365A thru SN74368A and SN74LS365A thru SN74LS368A are characterized for operation from 0°C to 70°C.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | Hex Bus Drivers With 3-State Outputs datasheet | Mar. 01, 1988 |
Selection guide | Logic Guide (Rev. AB) | Jun. 12, 2017 | |
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | Dec. 02, 2015 | |
User guide | LOGIC Pocket Data Book (Rev. B) | Jan. 16, 2007 | |
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | Jul. 08, 2004 | |
More literature | Logic Cross-Reference (Rev. A) | Oct. 07, 2003 | |
Application note | TI IBIS File Creation, Validation, and Distribution Processes | Aug. 29, 2002 | |
Application note | Designing With Logic (Rev. C) | Jun. 01, 1997 | |
Application note | Designing with the SN54/74LS123 (Rev. A) | Mar. 01, 1997 | |
Application note | Input and Output Characteristics of Digital Integrated Circuits | Oct. 01, 1996 | |
Application note | Live Insertion | Oct. 01, 1996 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.CAD/CAE symbols
Package | Pins | Download |
---|---|---|
CDIP (J) | 16 | View options |
CFP (W) | 16 | View options |
LCCC (FK) | 20 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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