|Package | Pins SOIC (D) | 14|
|Operating temperature range (°C) -40 to 125|
|Package qty | Carrier 50 | TUBE|
Features for the SN74AHCT125
- Inputs Are TTL-Voltage Compatible
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Description for the SN74AHCT125
The AHCT125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high. When OE\ is low, the respective gate passes the data from the A input to its Y output.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.