Product details

Technology family ALS Number of channels 2 Operating temperature range (°C) 0 to 70 Rating Catalog Supply current (max) (µA) 9000
Technology family ALS Number of channels 2 Operating temperature range (°C) 0 to 70 Rating Catalog Supply current (max) (µA) 9000
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • Applications:
    • Dual 2-Line to 4-Line Decoder
    • Dual 1-Line to 4-Line Demultiplexer
    • 3-Line to 8-Line Decoder
    • 1-Line to 8-Line Demultiplexer
  • Individual Strobes Simplify Cascading for Decoding or Demultiplexing Larger Words
  • Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic (N) 300-mil DIPs
  • Applications:
    • Dual 2-Line to 4-Line Decoder
    • Dual 1-Line to 4-Line Demultiplexer
    • 3-Line to 8-Line Decoder
    • 1-Line to 8-Line Demultiplexer
  • Individual Strobes Simplify Cascading for Decoding or Demultiplexing Larger Words
  • Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic (N) 300-mil DIPs

One of the main applications of the SN74ALS156 is as a dual 1-line to 4-line decoder/demultiplexer with individual strobes (G\) and common binary-address inputs in a single 16-pin package. When both sections are enabled, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit enabling or disabling each of the 4-bit sections, as desired.

Data applied to input 1C is inverted at its outputs and data applied at input 2C\ is not inverted through its outputs. The inverter following the 1C data input permits use of the SN74ALS156 as a 3-line to 8-line demultiplexer without external gating. All inputs are clamped with high-performance Schottky diodes to suppress line ringing and simplify system design.

The SN74ALS156 is characterized for operation from 0°C to 70°C.

One of the main applications of the SN74ALS156 is as a dual 1-line to 4-line decoder/demultiplexer with individual strobes (G\) and common binary-address inputs in a single 16-pin package. When both sections are enabled, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit enabling or disabling each of the 4-bit sections, as desired.

Data applied to input 1C is inverted at its outputs and data applied at input 2C\ is not inverted through its outputs. The inverter following the 1C data input permits use of the SN74ALS156 as a 3-line to 8-line demultiplexer without external gating. All inputs are clamped with high-performance Schottky diodes to suppress line ringing and simplify system design.

The SN74ALS156 is characterized for operation from 0°C to 70°C.

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Technical documentation

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Type Title Date
* Data sheet Decoder/Demultiplexer With Open-Collector Outputs datasheet (Rev. C) 01 May 1996
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note Advanced Schottky (ALS and AS) Logic Families 01 Aug 1995

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

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PDIP (N) 16 View options
SOIC (D) 16 View options

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