Product details

Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 32000 Features Flow-through pinout, High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 32000 Features Flow-through pinout, High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • 3-State Buffer-Type Outputs Drive Bus Lines Directly
  • Bus-Structured Pinout
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs

 

  • 3-State Buffer-Type Outputs Drive Bus Lines Directly
  • Bus-Structured Pinout
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs

 

These dual 4-bit D-type latches feature 3-state outputs designed specifically for bus driving. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The dual 4-bit latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs in true form, according to the function table. When LE is low, the outputs are latched. When the clear () input goes low, the Q outputs go low independently of LE. The outputs are in the high-impedance state when the output-enable () input is at a high logic level.

The SN54ALS873B and SN54AS873A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS873B and SN74AS873A are characterized for operation from 0°C to 70°C.

 

 

These dual 4-bit D-type latches feature 3-state outputs designed specifically for bus driving. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The dual 4-bit latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs in true form, according to the function table. When LE is low, the outputs are latched. When the clear () input goes low, the Q outputs go low independently of LE. The outputs are in the high-impedance state when the output-enable () input is at a high logic level.

The SN54ALS873B and SN54AS873A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS873B and SN74AS873A are characterized for operation from 0°C to 70°C.

 

 

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Technical documentation

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Type Title Date
* Data sheet Dual 4-Bit D-Type Latches With 3-State Outputs datasheet (Rev. D) 01 Aug 1995
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note Advanced Schottky (ALS and AS) Logic Families 01 Aug 1995

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74ALS873B IBIS Model

SDAM026.ZIP (11 KB) - IBIS Model
Package Pins Download
SOIC (DW) 24 View options

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