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SN74AS151

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1-of-8 Data Selectors/Multiplexers

Data sheet
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1-of-8 Data Selectors/Multiplexers

SN74AS151

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Data sheet Order now

Product details

Parameters

Technology Family AS Function Digital Multiplexer Configuration 8:1 Channels (#) 1 Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type Bipolar Output type Push-Pull Data rate (Max) (Mbps) 250 ICC (Max) (uA) 12000 open-in-new Find other Encoders & decoders

Package | Pins | Size

PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 SOP (NS) 16 80 mm² 10.2 x 7.8 open-in-new Find other Encoders & decoders

Features

  • 8-Line to 1-Line Multiplexers Can Perform as:
  • Boolean Function Generators
  • Parallel-to-Serial Converters
  • Data Source Selectors
  • Input Clamping Diodes Simplify System Design
  • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
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Description

These data selectors/multiplexers provide full binary decoding to select one-of-eight data sources. The strobe (G\) input must be at a low logic level to enable the inputs. A high level at the strobe terminal forces the W output high and the Y output low.

The SN54ALS151 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS151 and SN74AS151 are characterized for operation from 0°C to 70°C.

 

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 12
Type Title Date
* Datasheet 1-of-8 Data Selectors/Multiplexers datasheet (Rev. A) Dec. 01, 1994
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Advanced Schottky Load Management Feb. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note Advanced Schottky (ALS and AS) Logic Families Aug. 01, 1995

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
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CAD/CAE symbols

Package Pins Download
PDIP (N) 16 View options
SO (NS) 16 View options
SOIC (D) 16 View options

Ordering & quality

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  • MSL rating/Peak reflow
  • MTBF/FIT estimates
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  • Qualification summary
  • Ongoing reliability monitoring

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