Product details

Configuration 1:1 SPST Number of channels 1 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5 Protocols Analog Ron (typ) (Ω) 10 CON (typ) (pF) 7 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 50 Rating Catalog Drain supply voltage (max) (V) 2.7 Supply voltage (max) (V) 2.7
Configuration 1:1 SPST Number of channels 1 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5 Protocols Analog Ron (typ) (Ω) 10 CON (typ) (pF) 7 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 50 Rating Catalog Drain supply voltage (max) (V) 2.7 Supply voltage (max) (V) 2.7
DSBGA (YZP) 5 2.1875 mm² 1.75 x 1.25 SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Available in the Texas Instruments NanoFree™ Package
  • Wide VCC Range of 0.8 V to 2.7 V
  • Sub-1-V Operable
  • Low Power Consumption, 10-µA Max ICC
  • High On-Off Output Voltage Ratio
  • High Degree of Linearity
  • High Speed – Max 0.2 ns
    (VCC = 1.8 V, CL = 15 pF)
  • Low On-State Impedance – Typically 9
    (VCC = 2.3 V)
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

NanoFree Is a trademark of Texas Instruments.

  • Available in the Texas Instruments NanoFree™ Package
  • Wide VCC Range of 0.8 V to 2.7 V
  • Sub-1-V Operable
  • Low Power Consumption, 10-µA Max ICC
  • High On-Off Output Voltage Ratio
  • High Degree of Linearity
  • High Speed – Max 0.2 ns
    (VCC = 1.8 V, CL = 15 pF)
  • Low On-State Impedance – Typically 9
    (VCC = 2.3 V)
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

NanoFree Is a trademark of Texas Instruments.

This single analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC1G66 can handle both analog and digital signals. The combined AC and DC signal has to be between VCC and GND for it to be transmitted in either direction.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

This single analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC1G66 can handle both analog and digital signals. The combined AC and DC signal has to be between VCC and GND for it to be transmitted in either direction.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

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Technical documentation

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Type Title Date
* Data sheet Single Bilateral Analog Switch--SN74AUC1G66 datasheet (Rev. L) 10 Aug 2009
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices 21 Mar 2003
User guide AUC Data Book, January 2003 (Rev. A) 01 Jan 2003
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 Mar 2002
More literature AUC Product Brochure (Rev. A) 18 Mar 2002

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DIP-ADAPTER-EVM — DIP adapter evaluation module

Speed up your op amp prototyping and testing with the DIP adapter evaluation module (DIP-ADAPTER-EVM), which provides a fast, easy and inexpensive way to interface with small surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them (...)

User guide: PDF
Not available on TI.com
Interface adapter

LEADLESS-ADAPTER1 — Surface mount to DIP header adapter for testing of TI's 6,8,10,12,14,16, & 20-pin leadless packages

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
User guide: PDF
Not available on TI.com
Simulation model

HSPICE Model of SN74AUC1G66

SCEJ181.ZIP (89 KB) - HSpice Model
Simulation model

SN74AUC1G66 IBIS Model

SCEM337.ZIP (50 KB) - IBIS Model
Simulation model

SN74AUC1G66 PSpice Model

SCEM586.ZIP (1 KB) - PSpice Model
Package Pins Download
DSBGA (YZP) 5 View options
SOT-23 (DBV) 5 View options
SOT-SC70 (DCK) 5 View options

Ordering & quality

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  • Fab location
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