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SN74AUP1T34-Q1

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1-Bit Unidirectional Voltage-Level Translator, SN74AUP1T34-Q1

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Data sheet

SN74AUP1T34-Q1

ACTIVE
Data sheet Order now

Product details

Technology family AUP1T Applications GPIO Bits (#) 1 Configuration 1 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.6 High input voltage (max) (V) 3.6 Vout (min) (V) 0 Vout (max) (V) 3.6 Data rate (max) (Mbps) 200 IOH (max) (mA) -6 IOL (max) (mA) -6 Supply current (max) (µA) 3.6 Features 4.2 Input type Schmitt-Trigger, Standard CMOS Output type Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
Technology family AUP1T Applications GPIO Bits (#) 1 Configuration 1 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.6 High input voltage (max) (V) 3.6 Vout (min) (V) 0 Vout (max) (V) 3.6 Data rate (max) (Mbps) 200 IOH (max) (mA) -6 IOL (max) (mA) -6 Supply current (max) (µA) 3.6 Features 4.2 Input type Schmitt-Trigger, Standard CMOS Output type Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Qualified for Automotive Applications
    • AEC-Q100 Qualified
    • Device Temperature Grade 1: –40°C to 125°C
      Ambient Operating Temperature
    • Device HBM ESD Classification Level 3A
    • Device CDM ESD Classification Level C5
  • Wide Operating VCC Range of 0.9 V to 3.6 V
  • Balanced Propagation Delays: tPLH = tPHL
    (1.8-V to 3.3-V Translation Typical)
  • Low Static-Power Consumption: Maximum of 5-µA
    ICC
  • ±6-mA Output Drive at 3 V
  • Ioff Supports Partial Power-Down-Mode Operation
  • VCC Isolation Feature – If VCCA Input Is at GND,
    B Port Is in the High-Impedance state
  • Input Hysteresis Allows Slow Input Transition and
    Better Switching Noise Immunity at Input
  • ESD Protection Exceeds JESD 22
  • 5000-V Human-Body Model (AEC-Q100-002-E)
  • Latch-Up Performance Meets
    100 mA Per Q100-004-D
  • Qualified for Automotive Applications
    • AEC-Q100 Qualified
    • Device Temperature Grade 1: –40°C to 125°C
      Ambient Operating Temperature
    • Device HBM ESD Classification Level 3A
    • Device CDM ESD Classification Level C5
  • Wide Operating VCC Range of 0.9 V to 3.6 V
  • Balanced Propagation Delays: tPLH = tPHL
    (1.8-V to 3.3-V Translation Typical)
  • Low Static-Power Consumption: Maximum of 5-µA
    ICC
  • ±6-mA Output Drive at 3 V
  • Ioff Supports Partial Power-Down-Mode Operation
  • VCC Isolation Feature – If VCCA Input Is at GND,
    B Port Is in the High-Impedance state
  • Input Hysteresis Allows Slow Input Transition and
    Better Switching Noise Immunity at Input
  • ESD Protection Exceeds JESD 22
  • 5000-V Human-Body Model (AEC-Q100-002-E)
  • Latch-Up Performance Meets
    100 mA Per Q100-004-D

The SN74AUP1T34-Q1 device is a 1-bit noninverting translator that uses two separate configurable power-supply rails. It is a unidirectional translator from A to B. The A port is designed to track VCCA. VCCA accepts supply voltages from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts supply voltages from 0.9 V to 3.6 V. This allows for low-voltage translation between 1-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AUP1T34-Q1 is also fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if VCCA input is at GND, the B port is in the high-impedance state. If VCCB input is at GND, any input to the A side does not cause the leakage current even floating.

The SN74AUP1T34-Q1 device is a 1-bit noninverting translator that uses two separate configurable power-supply rails. It is a unidirectional translator from A to B. The A port is designed to track VCCA. VCCA accepts supply voltages from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts supply voltages from 0.9 V to 3.6 V. This allows for low-voltage translation between 1-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AUP1T34-Q1 is also fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if VCCA input is at GND, the B port is in the high-impedance state. If VCCB input is at GND, any input to the A side does not cause the leakage current even floating.
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Technical documentation

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Type Title Date
* Data sheet SN74AUP1T34-Q1 1-Bit Unidirectional Voltage-Level Translator datasheet (Rev. A) PDF | HTML 27 Apr 2016
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Technical article Using level shifters in automotive applications PDF | HTML 28 Mar 2016

Design & development

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Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
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Simulation model

SN74AUP1T34Q1 IBIS Model

SCEM565.ZIP (50 KB) - IBIS Model
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SOT-SC70 (DCK) 5 View options
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