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Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity


Models (2)

Title Category Type Date
HSPICE Model of SN74GTLP1395 (Rev. A) HSpice Model ZIP 02 Dec 2005
SN74GTLP1395 IBIS Model IBIS Model (Multiple Files) 05 Feb 2002

Design kits & evaluation modules (1)

Name Part# Type
Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, P, N, and DGV Packages 14-24-LOGIC-EVM Evaluation Modules & Boards