Automotive 8-bit parallel load shift register with TLL-compatible inputs

SN74HCT165-Q1

PREVIEW

Product details

Configuration Parallel-in, Serial-out Bits (#) 8 Technology Family HCT Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type TTL-Compatible CMOS Output type Push-Pull Clock Frequency (MHz) 25 IOL (Max) (mA) 6 IOH (Max) (mA) -6 ICC (Max) (uA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
Configuration Parallel-in, Serial-out Bits (#) 8 Technology Family HCT Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type TTL-Compatible CMOS Output type Push-Pull Clock Frequency (MHz) 25 IOL (Max) (mA) 6 IOH (Max) (mA) -6 ICC (Max) (uA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
TSSOP (PW) 16
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1:
      • –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • LSTTL input logic compatible
    • VIL(max) = 0.8 V, VIH(min) = 2 V
  • CMOS input logic compatible
    • II ≤ 1 µA at VOL, VOH
  • 4.5 V to 5.5 V operation
  • Supports fanout up to 10 LSTTL loads
  • Direct Overriding Load (Data) Inputs
  • Gated Clock Inputs
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1:
      • –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • LSTTL input logic compatible
    • VIL(max) = 0.8 V, VIH(min) = 2 V
  • CMOS input logic compatible
    • II ≤ 1 µA at VOL, VOH
  • 4.5 V to 5.5 V operation
  • Supports fanout up to 10 LSTTL loads
  • Direct Overriding Load (Data) Inputs
  • Gated Clock Inputs

The SN74HCT165-Q1 is a parallel- or serial-in, serial-out 8-bit shift register. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SN74HCT165-Q1 also features a clock-inhibit (CLK INH) function and a complementary serial (Q H) output.

The SN74HCT165-Q1 is a parallel- or serial-in, serial-out 8-bit shift register. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SN74HCT165-Q1 also features a clock-inhibit (CLK INH) function and a complementary serial (Q H) output.

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Technical documentation

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Type Title Date
* Data sheet SN74HCT165-Q1 Automotive 8-Bit Parallel-Load Shift Registers datasheet 15 Oct 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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TSSOP (PW) 16 View options

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