5-V, 1:1 (SPST), 4-channel general-purpose analog switch (CDIP & CFP packages)
Product details
Parameters
Package | Pins | Size
Features
- 2-V to 5.5-V VCC Operation
- Support Mixed-Mode Voltage Operation on All Ports
- High On-Off Output-Voltage Ratio
- Low Crosstalk Between Switches
- Individual Switch Controls
- Extremely Low Input Current
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Description
This quadruple silicon-gate CMOS analog switch is designed for 2-V to 5.5-V VCC operation.
These switches are designed to handle both analog and digital signals. Each switch permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.
Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
Technical documentation
| Type | Title | Date | |
|---|---|---|---|
| * | Datasheet | SN54LV4066A, SN74LV4066A datasheet (Rev. I) | Apr. 05, 2005 |
| Application note | Selecting the Right Texas Instruments Signal Switch (Rev. B) | Apr. 02, 2020 | |
| Application note | Multiplexers and Signal Switches Glossary | Mar. 06, 2020 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
Features
- Quick testing of TI's leaded surface mount packages
- Allows leaded suface mount packages to be plugged into 100mil spaced bread board
- Supports TI's 8 most popular leaded packages with a single panel
Design tools & simulation
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| PDIP (N) | 14 | View options |
| SO (NS) | 14 | View options |
| SOIC (D) | 14 | View options |
| SSOP (DB) | 14 | View options |
| TSSOP (PW) | 14 | View options |
| TVSOP (DGV) | 14 | View options |
| VQFN (RGY) | 14 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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