4-ch, 1.65-V to 3.6-V buffers with 3-state outputs
Product details
Parameters
Package | Pins | Size
Features
- Operates From 1.65 V to 3.6 V
- Specified From –40°C to +125°C
- Inputs Accept Voltages up to 5.5 V
- Maximum tpd of 4.7 ns at 3.3 V
- Typical VOLP (Output Ground Bounce), <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot), >2 V at VCC = 3.3 V, TA = 25°C
- Latch-Up Performance Exceeds 250 mA Per JESD 17
Description
The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic devices
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic and translation devices with included dual supply support
- Board has 9 sections that can be broken apart for a smaller form factor
Design tools & simulation
Reference designs
Design files
Design files
Design files
-
download TIDA-00951 Assembly Drawing.pdf (226KB) -
download TIDA-00951 PCB.pdf (1699KB) -
download TIDA-00951 CAD Files.zip (6563KB) -
download TIDA-00951 Gerber.zip (1995KB) -
download TIDA-00951 BOM (Rev. A).pdf (114KB)
Design files
-
download TIDA-00771 BOM.pdf (56KB) -
download TIDA-00771 Assembly Files.zip (165KB) -
download TIDA-00771 PCB.pdf (2015KB) -
download TIDA-00771 Gerber.zip (261KB)
Design files
-
download TIDA-00772 BOM.pdf (56KB) -
download TIDA-00772 Assembly Drawing.pdf (311KB) -
download TIDA-00772 Layer Plots.pdf (2560KB) -
download TIDA-00772 CAD Design Files.zip (2014KB) -
download TIDA-00772 Gerber.zip (333KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SO (NS) | 14 | View options |
SOIC (D) | 14 | View options |
SSOP (DB) | 14 | View options |
TSSOP (PW) | 14 | View options |
TVSOP (DGV) | 14 | View options |
VQFN (RGY) | 14 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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