SN74LVC32244

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32-Bit Buffer/Driver With 3-State Outputs

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Product details

Parameters

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Features

  • Member of the Texas Instruments Widebus+™ Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
       >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)

Widebus+ is a trademark of Texas Instruments.

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Description

This 32-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74LVC32244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE)\ inputs.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN74LVC32244 datasheet (Rev. C) Aug. 22, 2003
Selection guides Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes How to Select Little Logic (Rev. A) Jul. 26, 2016
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Simultaneous-Switching Performance of TI Logic Devices (Rev. B) Feb. 23, 2005
More literature Design Summary for WCSP Little Logic (Rev. B) Nov. 04, 2004
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application notes Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
Application notes Use of the CMOS Unbuffered Inverter in Oscillator Circuits Nov. 06, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
User guides LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) Dec. 18, 2002
Application notes Texas Instruments Little Logic Application Report Nov. 01, 2002
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application notes 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application notes Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices May 10, 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS Mar. 27, 2002
More literature Military Low Voltage Solutions Apr. 04, 2001
Application notes Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices Dec. 01, 1997
Application notes Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes LVC Characterization Information Dec. 01, 1996
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
User guides Low-Voltage Logic (LVC) Designer's Guide Sep. 01, 1996
Application notes Understanding Advanced Bus-Interface Products Design Guide May 01, 1996

Design & development

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Hardware development

DEVELOPMENT KITS Download
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The K2G Evaluation Module (EVM) enables developers to immediately start evaluating the 66AK2Gx - 600MHz processor, and to accelerate the development of audio, industrial motor control, smart grid protection and other high reliability, real-time compute intensive applications.  Similar to (...)

Features
  • 66AK2G02 C66x DSP+ARM A15 Processor at 600MHz
  • 2-GByte DDR3L with ECC
  • TPS659118 PMIC
  • Audio and Serial expansion headers
  • Processor SDK Linux and TI-RTOS support
  • Supports Gigabit Ethernet
DEVELOPMENT KITS Download
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699
Description

The EVMK2GX (also known as "K2G") 1GHz Evaluation Module (EVM) enables developers to immediately start evaluating the 66AK2Gx processor family, and to accelerate the development of audio, industrial motor control, smart grid protection and other high reliability, real-time compute intensive (...)

Features
  • 66AK2G12 C66x DSP+ARM A15 Processor at 1GHz
  • 2-GByte DDR3L with ECC
  • TPS65911A PMIC
  • Audio and serial expansion headers
  • Processor SDK Linux and TI-RTOS support
DEVELOPMENT KITS Download
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1049
Description

The K2G 1GHz High Secure Evaluation Module (EVM) enables developers to start  evaluating and testing the programming of the  high secure developmental version of the  66AK2Gx processor, and to accelerate the next stage of secure boot product development of audio and industrial real (...)

Features
  • 66AK2G12 C66x DSP+ARM A15 Processor at 1GHz
  • 2-GByte DDR3L with ECC
  • TPS65911A PMIC
  • Audio and serial expansion headers
  • Processor SDK Linux and TI-RTOS support

Design tools & simulation

SIMULATION MODELS Download
SCEM475.ZIP (41 KB) - IBIS Model
SIMULATION MODELS Download
SCEM607.ZIP (7 KB) - PSpice Model

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