Triple Differential Transceivers
Product details
Parameters
Package | Pins | Size
Features
- Three Differential Transceivers in One Package
- Signaling Rates† Up to 30 Mbps
- Low Power and High Speed
- Designed for TIA/EIA-485, TIA/EIA-422, ISO 8482, and ANSI X3.277 (HVD SCSI Fast-20) Applications
- Common-Mode Bus Voltage Range –7 V to 12 V
- ESD Protection on Bus Terminals Exceeds 12 kV
- Driver Output Current up to ±60 mA
- Thermal Shutdown Protection
- Driver Positive and Negative Current Limiting
- Power-Up, Power-Down Glitch-Free Operation
- Pin-Compatible With the SN75ALS170
- Available in Shrink Small-Outline Package
Description
The SN65LBC170 and SN75LBC170 are monolithic integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. Potential applications include serial or parallel data transmission, cabled peripheral buses with twin axial, ribbon, or twisted-pair cabling. These devices are suitable for FAST-20 SCSI and can transmit or receive data pulses as short as 25 ns, with skew less than 3 ns.
These devices combine three 3-state differential line drivers and three differential input line receivers, all of which operate from a single 5-V power supply.
The driver differential outputs and the receiver differential inputs are connected internally to form three differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. These ports feature a wide common-mode voltage range making the device suitable for party-line applications over long cable runs.
The drivers active-high enable and the receivers active-low enable are tied together internally and provide a direction input for each driver/receiver pair.
The SN75LBC170 is characterized for operation over the temperature range of 0°C to 70°C. The SN65LBC170 is characterized for operation over the temperature range of 40°C to 85°C.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | Triple Differential Transceivers datasheet (Rev. C) | Mar. 31, 2005 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SSOP (DB) | 16 | View options |
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