SoC processor w/ full-featured graphics, video & vision acceleration for ADAS applications


Product details


Arm CPU 2 Arm Cortex-A15 Arm MHz (Max.) 1176 Co-processor(s) 4 Arm Cortex-M4 CPU 32-bit Graphics acceleration 1 2D, 2 3D Display type 1 HDMIOUT, 3 LCD OUT Protocols Ethernet Ethernet MAC 2-port 1Gb switch PCIe 2 PCIe Gen3 Hardware accelerators 1 Image Video Accelerator, 4 Embedded Vision Engines (EVE) Features Vision Analytics Operating system Linux, Android, RTOS Security Cryptographic acceleration, Debug security, Device identity, Isolation firewalls, Secure boot & storage & programming, Software IP protection Rating Automotive Operating temperature range (C) -40 to 125 open-in-new Find other Arm-based processors

Package | Pins | Size

FCBGA (ABC) 760 FCBGA (ABC) 760 529 mm² 23 x 23 open-in-new Find other Arm-based processors


  • Architecture designed for ADAS applications
  • Video, image, and gaphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Dual Arm® Cortex®-A15 microprocessor subsystem
  • Up to two C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-Bit fixed-point multiplies per cycle
  • Up to 2.5MB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
    • Supports up to DDR2-800 and DDR3-1066
    • Up to 2GB supported per EMIF
  • Dual Arm® Cortex®-M4 Image Orocessing Units (IPU)
  • Vision acceleration pac
    • Up to four Embedded Vision Engines (EVEs)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Dual-core PowerVR® SGX544 3D GPU
  • Three Video Input Port (VIP) modules
    • Support for up to 10 multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • 2-port gigabit ethernet (GMAC)
  • Enhanced Direct Memory Access (EDMA) controller
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • PCI-Express® 3.0 port with integrated PHY
    • One 2-lane gen2-compliant port
    • or two 1-lane gen2-compliant ports
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Five Inter-Integrated Circuit (I2C) ports
  • SATA interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • Three high-speed USB 2.0 dual-role devices
  • Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC®/SD®/SDIO)
  • Up to 247 General-Purpose I/O (GPIO) pins
  • Real-Time Clock SubSystem (RTCSS)
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG® lock
    • Secure keys
    • Secure ROM and boot
  • Power, Reset, and Clock Management (PRSM)
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-Pin BGA (ABC)
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TI’s new TDA2x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2x family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2x SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2x SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm® Cortex®-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

The TDA2x ADAS processor is qualified according to the AEC-Q100 standard.

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More Information

This product family is available for high volume automotive manufacturers. Please contact your TI sales representative for more details.

Learn more about the TDAx SoC for advanced driver assistance systems (ADAS).

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Technical documentation

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Type Title Date
* Data sheet TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0 datasheet (Rev. F) Jun. 06, 2019
* Errata TDA2x ADAS Applications Processor (Rev. J) Jan. 08, 2021
Application note Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC May 05, 2021
Application note IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC Aug. 24, 2020
White paper Paving the way to self-driving cars with ADAS (Rev. A) Jul. 24, 2020
White paper Stereo vision- facing the challenges and seeing the opportunities for ADAS (Rev. A) Jul. 24, 2020
User guide TDA2x ADAS Applications Processor Public Technical Reference Manual (Rev. G) Feb. 22, 2020
Application note AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) Jan. 06, 2020
Technical article The need for speed – The future of radar processing Jul. 17, 2019
Application note Integrating New Cameras With Video Input Port on DRA7xx SoCs Jun. 11, 2019
Application note TDA2x/TDA2E Performance (Rev. A) Jun. 10, 2019
Technical article Bringing the next evolution of machine learning to the edge Nov. 27, 2018
Technical article Industry 4.0 spelled backward makes no sense – and neither does the fact that you haven’t heard of TI’s newest processor yet Oct. 30, 2018
Technical article How quality assurance on the Processor SDK can improve software scalability Aug. 22, 2018
Application note The Implementation of YUV422 Output for SRV Aug. 02, 2018
Application note MMC DLL Tuning (Rev. B) Jul. 31, 2018
Application note Integrating AUTOSAR on TI SoC: Fundamentals Jun. 18, 2018
Application note ECC/EDC on TDAxx (Rev. B) Jun. 13, 2018
Application note Sharing VPE Between VISIONSDK and PSDKLA May 04, 2018
Application note TMS320C66x XMC Memory Protection Jan. 31, 2018
Application note DSS Bit Exact Output (Rev. A) Jan. 12, 2018
Application note Flashing Utility - mflash Jan. 09, 2018
White paper Embedded low-power deep learning with TIDL Dec. 08, 2017
Application note Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) Nov. 07, 2017
Application note A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) Nov. 03, 2017
Application note DSS BT656 Workaround for TDA2x (Rev. A) Nov. 03, 2017
Application note Safety Features on VisionSDK Oct. 26, 2017
Application note Optimization of GPU-Based Surround View on TI’s TDA2x SoC Sep. 12, 2017
White paper Step into next-gen architectures for multi-camera operations in automobiles Jun. 16, 2017
White paper Making Cars Safer Through Technology Innovation (Rev. A) Jun. 07, 2017
Application note Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) Dec. 15, 2016
Application note Quad Channel Camera Application for Surround View and CMS Camera Systems (Rev. A) Aug. 23, 2016
Application note ADAS Power Management Mar. 07, 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs Feb. 23, 2016
User guide TDA2x EVM CPU Board User's Guide Feb. 09, 2016
User guide Vision Application Board User's Guide Feb. 09, 2016
White paper Surround view camera systems for ADAS (Rev. A) Oct. 20, 2015
Application note Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device Aug. 13, 2014
White paper TI Vision SDK, Optimized Vision Libraries for ADAS Systems Apr. 14, 2014
White paper TI Gives Sight to Vision-Enabled Automotive Technologies Oct. 16, 2013
White paper Empowering Automotive Vision with TI’s Vision AccelerationPac Oct. 13, 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The MMWCAS-DSP evaluation module (EVM) design provides a processing foundation for a cascaded imaging radar system. Cascade radar devices can support front, long-range radar (LRR), beamforming applications, as well as corner- and side-cascade radar and sensor fusion systems. This EVM design (...)

  • High-performance TDA2x device with four radar processing SIMD accelerators (one EVE per AWRx)
  • Ethernet and PCIe connectivity for control and data, respectively
  • Reference designs provided in Cascade Imaging Radar Capture Reference Design Using Jacinto™ ADAS Processor (TIDEP-01017) and Imaging Radar (...)
D3 ADAS Development Kit
Provided by D3 Engineering
This fully functioning evaluation system speeds on-vehicle testing and development of multi-camera, real-time vision applications requiring intensive video analytics. It shortens development time of vision-based systems for automotive, transportation, and materials handling applications.The ADAS (...)
document-generic User guide
TDA2x EVM is an evaluation platform designed to speed up development efforts and reduce time to market for ADAS applications. It is based on a TDA2x SoC which incorporate a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x Digital Signal (...)
  • Hardware
    • TDA2x Processor
    • 4GB DDR3L
    • TPS659039 Power Management IC
    • 4 GB eMMC
    • Vision Application board
  • Software
    • Vision SDK
    • StarterWare
  • Connectivity
    • Gigabit Ethernet (2)
    • MiniPCIe
    • e/mSATA
    • Micro SD Card
    • Micro USB 2.0
    • USB 3.0
    • HDMI
    • Audio in/out
    • WiLink8 Q  (Connector)
D3 Engineering RVP-TDAx development kits
Provided by D3 Engineering
These rugged development kits are in a finalized product form-factor that lets you evaluate TI ADAS technology under realistic on-vehicle conditions. Accelerate development of autonomous vision-based navigation systems for automotive, transportation and materials handling applications. The (...)

Software development

Processor SDK for TDAx ADAS SoCs - Linux and TI-RTOS Support
PROCESSOR-SDK-TDAX Processor SDK-Vision (Vision SDK) and Processor SDK-Radar (Radar SDK) are multi-processor software development kits for TDAx processors. The software framework allows users to create different ADAS application data flows involving radar capture, radar processing, video capture, video pre-processing (...)

RTOS SDK Key Features:

  • SYS-BIOS based SW stack for A15, IPU, C66x and EVE
  • SYS-BIOS based Device Drivers, Power management, Inter-processor communication (IPC), Networking Stack and Filesystem
  • TI Deep Learning library
  • Radar applets and kernels
  • EVE and DSP SW library and demo algorithms
  • More than 10 use (...)
Hella Aglaia TDAx-based ADAS algorithms for front camera
Provided by Hella Aglaia HELLA Aglaia develops embedded software solutions for advanced driver assistance systems – compliant with certified industry standards and ready for hardware integration.

Leveraging the powerful deep learning capabilities of the TDA4x processor family, HELLA Aglaia’s robust image processing (...)

Momenta deep learning algorithms for ADAS forward camera applications on TDA4x processors
Provided by Momenta Momenta’s deep learning based algorithms for ADAS applications make full use of the DSP cores and accelerators on TDA4x for neural network processing. Designed to achieve market leading computational and power efficiency, Momenta’s algorithms offer an array of pre- and post-imaging (...)
Provided by Green Hills Software — The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
QNX Neutrino RTOS
Provided by QNX Software Systems — The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)
StradVision SVNet - TDAx-based deep learning and camera based perception software
Provided by Stradvision — StradVision enables deep learning-based embedded perception algorithms on TDAx for Advanced Driver Assistance Systems (ADAS) and automated driving features. SVNet's lean and light characteristics enable more headroom for mutiple simultaneous functions, swift development and optimization, and (...)

Design tools & simulation

SPRM670.ZIP (28 KB) - BSDL Model
SPRM671.ZIP (36408 KB) - IBIS Model
SPRM672.ZIP (3 KB) - Thermal Model
Clock Tree Tool for Sitara, Automotive, Vision Analytics, & Digital Signal Processors
CLOCKTREETOOL The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree elements (...)
document-generic User guide
Arm-based MPU, arm-based MCU and DSP third-party search tool
PROCESSORS-3P-SEARCH TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
  • Supports many TI processors including Sitara and Jacinto processors and DSPs
  • Search by type of product, TI devices supported, or country
  • Links and contacts for quick engagement
  • Third-party companies located around the world

Reference designs

Cascade imaging radar capture reference design using Jacinto™ ADAS processor
TIDEP-01017 The cascade development kit has two main use cases:
  1. To use the MMWCAS-DSP-EVM as a capture card to fully evaluate the AWR2243 four-chip cascade performance by using the mmWave studio tool, please read the TIDEP-01012 design guide.
  2. To use the MMWCAS-DSP-EVM to develop radar real time SW application (...)
document-generic Schematic

CAD/CAE symbols

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FCBGA (ABC) 760 View options

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