Top

Product details

Parameters

Function Deserializer Color depth (bpp) 24 Input compatibility V3Link Pixel clock frequency (Max) (MHz) 100 Output compatibility MIPI CSI-2 Features Line Fault Detection, Flexible GPIOs, Coax or STP, Ultra-Low Data and Control Path Latency, Port Replication Mode, Internal Programmable Precision Frame Sync Generator, Pattern Generation Signal conditioning Adaptive Equalizer, Programmable Equalizer EMI reduction LVDS, SSC Compatible Diagnostics BIST Operating temperature range (C) -20 to 85 open-in-new Find other V3Link SerDes

Package | Pins | Size

VQFNP (RTD) 64 81 mm² 9 x 9 open-in-new Find other V3Link SerDes

Features

  • Quad 4.16-Gbps Deserializer Hub Aggregates Data From up to 4 Sensors Simultaneously

  • Supports 2-Megapixel Sensors With Full HD 1080p Resolution at 60-Hz Frame Rate
  • Device Temperature Range: –20℃ to +85℃ Ambient Operating Temperature
  • Precise Multi-Camera Synchronization
  • MIPI DPHY Version 1.2 / CSI-2 Version 1.3 Compliant
    • 2 × MIPI CSI-2 Output Ports
    • Supports 1, 2, 3, 4 Data Lanes per CSI-2 port
    • CSI-2 Data Rate Scalable for 400 Mbps / 800 Mbps / 1.2 Gbps /1.5 Gbps / 1.6 Gbps per Data Lane
    • Port Replication Mode
  • Ultra-Low Data and Control Path Latency
  • Supports Single-Ended Coaxial Including Power-over-Coax (PoC) or Shielded Twisted-Pair (STP) Cable
  • Adaptive Receive Equalization
  • Dual I2C Ports With Fast-Mode Plus up to 1 Mbps
  • Flexible GPIOs for Sensor Synchronization and Diagnostics
  • Compatible With TSER953 Serializer

  • Internal Programmable Precision Frame Sync Generator
  • Line Fault Detection and Advanced Diagnostics
open-in-new Find other V3Link SerDes

Description

The TDES960 is a versatile sensor hub capable of connecting serialized sensor data received from four independent video data streams through a V3Link interface. When paired with a TSER953 serializer, the TDES960 receives data from sensors such as imagers supporting full HD 1080p/2MP resolution at 60-Hz frame rates. Data is received and aggregated into a MIPI CSI-2 compliant output for interconnect to a downstream processor. A second MIPI CSI-2 output port is available to provide additional bandwidth, or offers a second replicated output for data-logging and parallel processing.

The TDES960 includes four V3Link deserializers, each enabling a connection through cost-effective 50-Ω single-ended coaxial or 100-Ω differential STP cables. The receive equalizers automatically adapt to compensate for cable loss characteristics, including degradation over time.

Each of the V3Link interfaces also includes a separate low latency bidirectional control channel that continuously conveys I2C, GPIOs, and other control information. General-purpose I/O signals such as those required for camera synchronization and diagnostics features also make use of this bidirectional control channel.

The TDES960 is offered in a cost-effective and space-saving 64-pin VQFN package.

open-in-new Find other V3Link SerDes
Download

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 2
Type Title Date
* Data sheet TDES960 Quad 4.16-Gbps V3Link Deserializer Hub With MIPI CSI-2 Interface for High Speed, High Resolution Cameras, RADAR, and Other Sensors datasheet Mar. 08, 2021
Technical article How to transfer high-resolution video data over a single wire in machine vision-based applications Jul. 12, 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SIMULATION MODEL Download
SNLM245.ZIP (110 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
VQFN (RTD) 64 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos