Product details


Protocols LIN, SBC Number of channels (#) 1 Supply voltage (V) 5 to 28 Bus fault voltage (V) -42 to 42 Signaling rate (Max) (Mbps) 0.1 Rating Automotive Operating temperature range (C) -40 to 125 Low power mode Sleep Isolated No open-in-new Find other CAN & LIN transceivers & SBCs

Package | Pins | Size

VSON (DMT) 14 14 mm² 3 x 4.5 open-in-new Find other CAN & LIN transceivers & SBCs


  • AEC-Q100: Qualified for automotive applications
    • Temperature grade 1: –40°C To 125°C TA
  • Local interconnect network (LIN) physical layer specification ISO/DIS 17987–4.2 compliant and conforms to SAE J2602 recommended practice for LIN (See SLLA494)
  • Supports 12-V applications
  • Integrated watchdog supervisor configurable by pin or serial peripheral interface SPI
  • Wide operating ranges
    • 5.5 V to 28 V supply voltage
    • ±42 V LIN bus fault protection
    • LDO output supporting 3.3 V (TLIN14413-Q1) or 5 V (TLIN14415-Q1)
    • Sleep mode: ultra-low current
      consumption allows wake up event from:
      • LIN bus
      • Local wake up through EN
      • Local wake up through WAKE
    • Power up and down glitch-free operation
  • Protection features:
    • ESD protection
    • Under-voltage protection on VSUP
    • TXD dominant time out (DTO) protection
    • Thermal-shutdown protection
    • Unpowered node or ground disconnection fail-safe at system level
  • VCC sources 125 mA with 12 VSUP at 100°C
  • Available in Leadless VSON (14) package with improved automated optical inspection (AOI) capability
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The TLIN1441-Q1 is a local interconnect network (LIN) physical layer transceiver, compliant to LIN 2.2A and ISO/DIS 17987–4.2 standards, with an integrated low dropout (LDO) voltage regulator and watchdog. The TLIN1441-Q1 watchdog can operate in window or timeout mode and can be controlled by pins or SPI. The Pin or SPI control is established at power up by the state of pin 9 (that is, High, Z-State, Low).

LIN is a single-wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for end-of-line programming. The TLIN1441-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal. The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. The TLIN1441-Q1 reduces system complexity by providing a 3.3 V or 5 V rail with up to 125 mA of current to power microprocessors, sensors or other devices. The TLIN1441-Q1 has an optimized current-limited wave-shaping driver which reduces electromagnetic emissions (EME).

Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or pin. The LIN bus has two states: dominant state (voltage near ground) and recessive state (voltage near battery). In the recessive state, the LIN bus is pulled high by the internal pull-up resistor (45 kΩ) and a series diode. No external pull-up components are required for slave applications. Master applications require an external pull-up resistor (1 kΩ) plus a series diode per the LIN specification.

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Technical documentation

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Type Title Date
* Data sheet TLIN1441-Q1 Automotive Local Interconnect Network (LIN) Transceiver with Integrated Voltage Regulator and Watchdog datasheet (Rev. C) Jun. 26, 2019
* Errata TLIN1441-Q1 and TLIN2441-Q1 Duty Cycle Over VSUP May 22, 2020
Technical article System basis chips 101 - A beginner's guide to CAN, CAN FD and LIN SBCs Jun. 10, 2019
Application note TLIN1441 Failsafe Mode Explanation Feb. 25, 2019
Application note TLINx441 LDO Performance Nov. 16, 2018
Application note TLINx441x Watchdog Configuration Guide Oct. 30, 2018
User guide TLINX441XEVM User's Guide Aug. 23, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
This EVM can be used to evaluate the TLINx441x family of devices. The LIN bus is easily accessed via the J21 connector, along with VSUP and GND to make easy connections to real LIN systems. All IC signals are available through jumper connections, and modes are easily transitioned through the (...)
  • Provides access to LIN bus, TXD, and RXD pins
  • Standby and Sleep mode can be easily accessed and transitioned via connectors and jumpers.
  • Access to LDO output is available, along with connectors to apply a load.
  • USB2ANY interface can work with GUI to communicate and control the device.
  • Silkscreen is (...)

Software development

SLLC468.ZIP (33090 KB)

Design tools & simulation

SLLM426.ZIP (180 KB) - IBIS Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

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