TLV2548-EP

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Enhanced Product 2-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S/W and H/W), Low Power W/8 x FIFO W/8 Ch

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Product details

Parameters

Resolution (Bits) 12 Number of input channels 8 Sample rate (Max) (kSPS) 200 Interface type SPI Architecture SAR Input type Single-Ended Multi-channel configuration Multiplexed Rating HiRel Enhanced Product Reference mode Ext, Int Input range (Max) (V) 5.5 Input range (Min) (V) 0 Features Oscillator Operating temperature range (C) -55 to 125 Power consumption (Typ) (mW) 3.3 Analog voltage AVDD (Min) (V) 3 SNR (dB) 71 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 1.2 Digital supply (Min) (V) 3 Digital supply (Max) (V) 5.5 open-in-new Find other Precision ADCs (<=10MSPS)

Package | Pins | Size

TSSOP (PW) 20 42 mm² 6.5 x 6.4 open-in-new Find other Precision ADCs (<=10MSPS)

Features

  • Maximum Throughput 200-KSPS
  • Built-In Reference, Conversion Clock and 8x FIFO
  • Differential/Integral Nonlinearity Error: ±1.2 LSB
  • Signal-to-Noise and Distortion Ratio: 70 dB, fi = 12 kHz
  • Spurious Free Dynamic Range: 75 dB, fi = 12 kHz
  • SPI (CPOL = 0, CPHA = 0)/DSP-Compatible Serial Interfaces
    With SCLK up to 20 MHz
  • Single Wide Range Supply 3.0 Vdc to 5.5 Vdc
  • Analog Input Range 0 V to Supply Voltage With 500-kHz BW
  • Hardware Controlled and Programmable Sampling Period
  • Low Operating Current (1.0 mA at 3.3 V, 2.0 mA at 5.5 V With External Ref,
    1.7-mA at 3.3V, 2.4-mA at 5.5-V With Internal Ref)
  • Power Down: Software/Hardware
    Power-Down Mode (1 µA Max, Ext Ref),
    Autopower-Down Mode (1 µA, Ext Ref)
  • Programmable Auto-Channel Sweep
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Custom temperature ranges available

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Description

The TLV2548 is a high performance, 12-bit low-power, 3.86-µs, CMOS analog-to-digital converter (ADC) which operates from a single 3.0-V to 5.5-V power supply. This device has three digital inputs and a 3-state output [chip select (CS), serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TI DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame.

In addition to a high-speed A/D converter and versatile control capability, this device has an on-chip analog multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular among high-performance signal processors. The TLV2548 is designed to operate with very low power consumption. The power-saving feature is further enhanced with software/hardware/autopower-down modes and programmable conversion speeds. The conversion clock (OSC) and reference are built-in. The converter can use the external SCLK as the source of the conversion clock to achieve higher (up to 2.8 µs when a 20-MHz SCLK is used) conversion speed. Two different internal reference voltages are available. An optional external reference can also be used to achieve maximum flexibility.

The TLV2548 is characterized for operation from –55°C to 125°C.

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Technical documentation

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Type Title Date
* Data sheet 2.7-V to 5.5-V 12-Bit 200 KSPS 4-/8-Channel Low-Power Serial Converter datasheet Oct. 28, 2009
* VID TLV2548-EP VID V6210603 Jun. 21, 2016
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs May 21, 2015
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 Mar. 17, 2011
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) Nov. 10, 2010

Design & development

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Design tools & simulation

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PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
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SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
CALCULATION TOOL Download
Analog-to-digital converter (ADC) input driver design tool supporting multiple input types
ADC-INPUT-CALC ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and transformer-coupled (...)
CALCULATION TOOL Download
Analog engineer's calculator
ANALOG-ENGINEER-CALC — The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Features
  • Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
    • Noise calculations
    • Common unit translation
  • Solves common amplifier circuit design problems
    • Gain selections using standard resistors
    • Filter configurations
    • Total noise for common amplifier configurations
  • (...)

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TSSOP (PW) 20 View options

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