TMS320C6201 is not recommended for new designs.
This product continues to be in production to support existing customers. Please consider one of these alternatives:
Similar but not functionally equivalent to the compared device:
TMS320C6742 ACTIVE C674x DSP - 200MHz This product is a newer generation of floating point DSPs with higher performance & improved connectivity options.
Top

Product details

Parameters

We are not able to display this information. Please refer to the product data sheet.

Package | Pins | Size

FCBGA (GJC) 352 1225 mm² 35 x 35 FCBGA (GJL) 352 729 mm² 27 x 27 open-in-new Find other C6000 floating-point DSPs

Features

  • High-Performance Fixed-Point Digital Signal Processor (DSP) TMS320C6201
    • 5-ns Instruction Cycle Time
    • 200-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 1600 MIPS
  • VelociTI™ Advanced Very Long Instruction Word (VLIW) TMS320C62x™ DSP CPU Core
    • Eight Independent Functional Units:
      • Six ALUs (32-/40-Bit)
      • Two 16-Bit Multipliers (32-Bit Results)
    • Load-Store Architecture With 32 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-, 16-, 32-Bit Data)
    • 32-Bit Address Range
    • 8-Bit Overflow Protection
    • Saturation
    • Bit-Field Extract, Set, Clear
    • Bit-Counting
    • Normalization
  • 1M-Bit On-Chip SRAM
    • 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)
    • 512K-Bit Dual-Access Internal Data (64K Bytes) Organized as Two Blocks for Improved Concurrency
  • 32-Bit External Memory Interface (EMIF)
    • Glueless Interface to Asynchronous Memories: SRAM and EPROM
    • Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
  • Four-Channel Bootloading Direct-Memory-Access (DMA) Controller with an Auxiliary Channel
  • 16-Bit Host-Port Interface (HPI)
    • Access to Entire Memory Map
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • ST-Bus-Switching Compatible
    • Up to 256 Channels Each
    • AC97-Compatible
    • Serial Peripheral Interface (SPI) Compatible (Motorola™)
  • Two 32-Bit General-Purpose Timers
  • Flexible Phase-Locked Loop (PLL) Clock Generator
  • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
  • 352-Pin BGA Package (GJC Suffix)
  • 352-Pin BGA Package (GJL Suffix)
  • CMOS Technology
    • 0.18-µm/5-Level Metal Process
  • 3.3-V I/Os, 1.8-V Internal

VelociTI and TMS320C62x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 and C62x are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.
The TMS320C6201 device shall be referred to as C6201 throughout the remainder of this document.

open-in-new Find other C6000 floating-point DSPs

Description

The TMS320C62x™ DSPs (including the TMS320C6201) are the fixed-point DSP family in the TMS320C6000™ DSP platform. The C6201 device is based on the high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. With performance of up to 1600 MIPS at a clock rate of 200 MHz, the C6201 offers cost-effective solutions to high-performance DSP programming challenges. The C6201 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The C6201 can produce two multiply-accumulates (MACs) per cycle--for a total of 466 million MACs per second (MMACS). The C62x™ DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6201 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory of the C6201 consists of two 32K-byte blocks of RAM for improved concurrency. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C62x™ DSP has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

open-in-new Find other C6000 floating-point DSPs
Download

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 63
Type Title Date
* Datasheet TMS320C6201 Digital Signal Processor datasheet (Rev. H) Mar. 01, 2004
* Errata TMS320C6201 DSP Silicon Errata Oct. 30, 2000
Application notes How to Migrate CCS 3.x Projects to the Latest CCS Feb. 06, 2020
User guides TMS320C62x DSP CPU and Instruction Set Reference Guide (Rev. A) May 20, 2010
User guides TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. Q) Jul. 02, 2009
Application notes TMS320C620x/C642x McBSP: UART (Rev. C) Sep. 09, 2008
Application notes TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E) Sep. 04, 2007
Application notes Thermal Considerations for the DM64xx, DM64x, and C6000 Devices May 20, 2007
User guides TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E) Apr. 11, 2007
User guides TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. G) Dec. 14, 2006
User guides TMS320C6000 CPU and Instruction Set Reference Guide (Rev. G) Jul. 11, 2006
User guides TMS320C6000 DSP Host-Post Interface (HPI) Reference Guide (Rev. C) Jan. 01, 2006
User guides TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C) Mar. 01, 2005
User guides TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B) Jan. 25, 2005
User guides TMS320C620x/C670x DSP Program & Data Memory Controller/DMA Controller Ref.Guide (Rev. A) Sep. 03, 2004
User guides TMS320C6000 Chip Support Library API Reference Guide (Rev. J) Aug. 13, 2004
Application notes TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D) Apr. 26, 2004
Application notes TMS320C6000 Board Design: Considerations for Debug (Rev. C) Apr. 21, 2004
Application notes TMS320C6000 McBSP Initialization (Rev. C) Mar. 08, 2004
User guides TMS320C6000 DSP Interrupt Selector Reference Guide (Rev. A) Jan. 09, 2004
User guides TMS320C6000 DSP Designing for JTAG Emulation Reference Guide Jul. 31, 2003
User guides TMS320C620x/C670x DSP Boot Modes and Configuration Reference Guide Jul. 31, 2003
Application notes Using IBIS Models for Timing Analysis (Rev. A) Apr. 15, 2003
Application notes Extended Precision Radix-4 Fast Fourier Transform Implemented on the TMS320C62x Nov. 23, 2002
User guides TMS320C6201/6701 Evaluation Module User's Guide (Rev. F) Aug. 13, 2002
Application notes TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B) Jun. 04, 2002
Application notes TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C) Apr. 17, 2002
Application notes TMS320C6000 DMA Example Applications (Rev. A) Apr. 10, 2002
Application notes TMS320C6000 Board Design for JTAG (Rev. C) Apr. 02, 2002
Application notes TMS320C6000 Memory Test (Rev. A) Feb. 19, 2002
Application notes TMS320C6000 EMIF to External Flash Memory (Rev. A) Feb. 13, 2002
Application notes Using a TMS320C6000 McBSP for Data Packing (Rev. A) Oct. 31, 2001
Application notes Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A) Sep. 30, 2001
Application notes TMS320C6000 Host Port to MC68360 Interface (Rev. A) Sep. 30, 2001
Application notes TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A) Aug. 31, 2001
Application notes TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A) Aug. 31, 2001
Application notes Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A) Aug. 31, 2001
Application notes TMS320C6000 System Clock Circuit Example (Rev. A) Aug. 15, 2001
Application notes TMS320C6201/6701 EVM: TMS320C6000 McBSP to Multimedia Audio Codec (Rev. A) Jul. 24, 2001
Application notes TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A) Jul. 23, 2001
Application notes TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A) Jul. 10, 2001
Application notes TMS320C6000 McBSP: Interface to SPI ROM (Rev. C) Jun. 30, 2001
Application notes TMS320C6000 Host Port to MPC860 Interface (Rev. A) Jun. 21, 2001
Application notes Using TI FIFOs to Interface High-Speed Data Converters With TI TMS320 DSPs Jun. 08, 2001
Application notes TMS320C6000 McBSP: IOM-2 Interface (Rev. A) May 21, 2001
Application notes ETSI Math Operations in C for the TMS320C62x (Rev. A) Nov. 13, 2000
Application notes Circular Buffering on TMS320C6000 (Rev. A) Sep. 12, 2000
Application notes TMS320C6000 McBSP as a TDM Highway (Rev. A) Sep. 11, 2000
Application notes MPEG-2 Video Decoder: TMS320C62x (TM) DSP Implementation Feb. 29, 2000
Application notes TMS320C6000 u-Law and a-Law Companding with Software or the McBSP Feb. 02, 2000
Application notes General Guide to Implement Logarithmic and Exponential Operations on Fixed-Point Jan. 31, 2000
Application notes G.723.1 Dual Rate Speech Coder: Multichannel TMS320C62x Implementation (Rev. B) Jan. 04, 2000
Application notes G.729/A Speech Coder: Multichannel TMS320C62x Implementation (Rev. B) Jan. 04, 2000
Application notes GSM Enhanced Full Rate Speech Coder: Multichannel TMS320C62x Implementation (Rev. B) Jan. 04, 2000
Application notes IS-127 Enhanced Var Rate Speech Coder:Multichannel TMS320C62x Implementation (Rev. B) Jan. 04, 2000
Application notes TMS320C6000 C Compiler: C Implementation of Intrinsics Dec. 07, 1999
Application notes TMS320C6000 McBSP: I2S Interface Sep. 08, 1999
Application notes On the Implementation of MPEG-4 Motion Compensation Using the TMS320C62x Jul. 29, 1999
Application notes TMS320C62x/67x Power Supply Solutions for 1-2 DSPs Using the TL5001A and TPS7133 (Rev. A) Jun. 01, 1999
Application notes Software Development Techniques for the TMS320C6201 DSP Dec. 31, 1998
Application notes Setting Up TMS320C6201 Interrupts in C Dec. 10, 1998
Application notes TPS5625 Working with TMS320C6201 Applications Oct. 28, 1998
Application notes TMS320C6201 (Revision 2.x) to TMS320C6201B (Revision 3.X) (Rev. A) Sep. 02, 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software development

DEBUG PROBES Download
XDS560v2 System Trace USB Debug Probe
TMDSEMU560V2STM-U The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

995
Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DEBUG PROBES Download
XDS560v2 System Trace USB & Ethernet Debug Probe
TMDSEMU560V2STM-UE The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

1495
Features
  • XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DRIVERS & LIBRARIES Download
C62x/C64x Fast Run-Time Support (RTS) Library
SPRC122 The C62x/64x FastRTS Library is an optimized, floating-point function library for C programmers using either TMS320C62x or TMS320C64x devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By replacing the current (...)
DRIVERS & LIBRARIES Download
TMS320C6000 DSP Library (DSPLIB)
SPRC265 TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Optimized DSP routines including functions for:

  • Adaptive filtering
  • Correlation
  • FFT
  • Filtering and convolution: FIR, biquad, IIR, convolution
  • Math: Dot products, max value, min value, etc.
  • Matrix operations
DRIVERS & LIBRARIES Download
Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors
TELECOMLIB Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be acquired (...)
Features

VoLIB

  • Telogy Software Line Echo Canceller (ECU)
  • Tone Detection Unit (TDU)
  • Caller ID Detection/Generation (CID)
  • Tone Generation Unit (TGU)
  • Voice Activity Detection Unit (VAU)
  • Noise Matching Functions
  • Packet Loss Concealment (PLC)
  • Voice Enhancement Unit (VEU)  

FAXLIB

  • Fax Interface Unit (FIU)
  • Fax Modem (FM)
  • (...)
IDES, CONFIGURATION, COMPILERS & DEBUGGERS Download
C6000 code generation tools - compiler
C6000-CGT — The TI C6000 C/C++ Compiler and Assembly Language Tools support development of applications for TI C6000 Digital Signal Processor platforms, including the C66x multi-core, C674x and C64x+ single-core Digital Signal Processors.
Features
  • Available in C6000 Code Generation Tools starting with v8.3.0:
    • Supports the C++14 Standard ISO/IEC 14882:2014 (C++03 is no longer supported)
  • Available in C6000 Code Generation Tools starting with release v8.2.0:
    • Conversion of floating-point values to unsigned char or short no longer generate RTS (...)

Design tools & simulation

SIMULATION MODELS Download
SPRM017.ZIP (8 KB) - IBIS Model
SIMULATION MODELS Download
SPRM018.ZIP (7 KB) - IBIS Model
SIMULATION MODELS Download
SPRM030.ZIP (4 KB) - BSDL Model
SIMULATION MODELS Download
SPRM031.ZIP (4 KB) - BSDL Model

CAD/CAE symbols

Package Pins Download
FCBGA (GJC) 352 View options
FCBGA (GJL) 352 View options

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos

Related videos