Fixed-Point Digital Signal Processor



Product details


DSP 1 C55x DSP MHz (Max) 200, 144, 108 CPU 16-bit Operating system DSP/BIOS Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other Digital signal processors (DSPs)

Package | Pins | Size

LQFP (PGE) 144 484 mm² 22 x 22 NFBGA (GBB) 179 144 mm² 12 x 12 NFBGA (ZAY) 179 144 mm² 12 x 12 open-in-new Find other Digital signal processors (DSPs)


  • High-Performance, Low-Power, Fixed-Point TMS320C55™ Digital Signal Processor
    • 9.26-, 6.95-, 5-ns Instruction Cycle Time
    • 108-, 144-, 200-MHz Clock Rate
    • One/Two Instruction(s) Executed per Cycle
    • Dual Multipliers [Up to 400 Million Multiply-Accumulates per Second (MMACS)]
    • Two Arithmetic/Logic Units (ALUs)
    • Three Internal Data/Operand Read Buses and Two Internal Data/Operand Write Buses
  • 128K × 16-Bit On-Chip RAM, Composed of:
    • 64K Bytes of Dual-Access RAM (DARAM) 8 Blocks of 4K × 16-Bit
    • 192K Bytes of Single-Access RAM (SARAM) 24 Blocks of 4K × 16-Bit
  • 64K Bytes of One-Wait-State On-Chip ROM (32K × 16-Bit)
  • 8M × 16-Bit Maximum Addressable External Memory Space (Synchronous DRAM)
  • 16-Bit External Parallel Bus Memory Supporting Either:
    • External Memory Interface (EMIF) With GPIO Capabilities and Glueless Interface to:
      • Asynchronous Static RAM (SRAM)
      • Asynchronous EPROM
      • Synchronous DRAM (SDRAM)
    • 16-Bit Parallel Enhanced Host-Port Interface (EHPI) With GPIO Capabilities
  • Programmable Low-Power Control of Six Device Functional Domains
  • On-Chip Scan-Based Emulation Logic
  • On-Chip Peripherals
    • Two 20-Bit Timers
    • Watchdog Timer
    • Six-Channel Direct Memory Access (DMA) Controller
    • Three Serial Ports Supporting a Combination of:
      • Up to 3 Multichannel Buffered Serial Ports (McBSPs)
      • Up to 2 MultiMedia/Secure Digital CardInterfaces
    • Programmable Phase-Locked Loop Clock Generator
    • Seven (LQFP) or Eight (BGA) General-Purpose I/O (GPIO) Pins and a General- Purpose Output Pin (XF)
    • USB Full-Speed (12 Mbps) Slave Port Supporting Bulk, Interrupt and Isochronous Transfers
    • Inter-Integrated Circuit (I2C) Multi-Master and Slave Interface
    • Real-Time Clock (RTC) With Crystal Input, Separate Clock Domain, Separate Power Supply
    • 4-Channel (BGA) or 2-Channel (LQFP) 10-Bit Successive Approximation A/D
  • IEEE Std 1149.1(1) (JTAG) Boundary Scan Logic
  • Packages:
    • 144-Terminal Low-Profile Quad Flatpack (LQFP) (PGE Suffix)
    • 179-Terminal MicroStar BGA™ (Ball Grid Array) (GHH and ZHH Suffixes)
    • 179-Terminal Lead-Free MicroStar BGA™ (Ball Grid Array) (ZHH Suffix)
  • 1.2-V Core (108 MHz), 2.7-V - 3.6-V I/Os
  • 1.35-V Core (144 MHz), 2.7-V - 3.6-V I/Os
  • 1.6-V Core (200 MHz), 2.7-V - 3.6-V I/Os

All trademarks are the property of their respective owners.
TMS320C55x and MicroStar BGA are trademarks of Texas Instruments.
C55x, eXpressDSP, Code Composer Studio, DSP/BIOS, RTDX, and XDS510 are trademarks of Texas Instruments.

(1) IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.

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The TMS320VC5509A fixed-point digital signal processor (DSP) is based on the TMS320C55x DSP generation CPU processor core. The C55x™ DSP architecture achieves high performance and low power through increased parallelism and total focus on reduction in power dissipation. The CPU supports an internal bus structure that is composed of one program bus, three data read buses, two data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to three data reads and two data writes in a single cycle. In parallel, the DMA controller can perform up to two data transfers per cycle independent of the CPU activity.

The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit × 17-bit multiplication in a single cycle. A central 40-bit arithmetic/logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.

The C55x DSP generation supports a variable byte width instruction set for improved code density. The Instruction Unit (IU) performs 32-bit program fetches from internal or external memory and queues instructions for the Program Unit (PU). The Program Unit decodes the instructions, directs tasks to AU and DU resources, and manages the fully protected pipeline. Predictive branching capability avoids pipeline flushes on execution of conditional instructions.

The general-purpose input and output functions and the 10-bit A/D provide sufficient pins for status, interrupts, and bit I/O for LCDs, keyboards, and media interfaces. The parallel interface operates in two modes, either as a slave to a microcontroller using the HPI port or as a parallel media interface using the asynchronous EMIF. Serial media is supported through two MultiMedia Card/Secure Digital (MMC/SD) peripherals and three McBSPs.

The 5509A peripheral set includes an external memory interface (EMIF) that provides glueless access to asynchronous memories like EPROM and SRAM, as well as to high-speed, high-density memories such as synchronous DRAM. Additional peripherals include Universal Serial Bus (USB), real-time clock, watchdog timer, and I2C multi-master and slave interface. Three full-duplex multichannel buffered serial ports (McBSPs) provide glueless interface to a variety of industry-standard serial devices, and multichannel communication with up to 128 separately enabled channels. The enhanced host-port interface (HPI) is a 16-bit parallel interface used to provide host processor access to 32K bytes of internal memory on the 5509A. The HPI can be configured in either multiplexed or non-multiplexed mode to provide glueless interface to a wide variety of host processors. The DMA controller provides data movement for six independent channel contexts without CPU intervention, providing DMA throughput of up to two 16-bit words per cycle. Two general-purpose timers, up to eight dedicated general-purpose I/O (GPIO) pins, and digital phase-locked loop (DPLL) clock generation are also included.

The 5509A is supported by the industry‘s award-winning eXpressDSP™, Code Composer Studio™ Integrated Development Environment (IDE), DSP/BIOS™, Texas Instruments’ algorithm standard, and the industry‘s largest third-party network. The Code Composer Studio IDE features code generation tools including a C Compiler and Visual Linker, simulator, RTDX™, XDS510™ emulation device drivers, and evaluation modules. The 5509A is also supported by the C55x DSP Library which features more than 50 foundational software kernels (FIR filters, IIR filters, FFTs, and various math functions) as well as chip and board support libraries.

The TMS320C55x DSP core was created with an open architecture that allows the addition of application-specific hardware to boost performance on specific algorithms. The hardware extensions on the 5509A strike the perfect balance of fixed function performance with programmable flexibility, while achieving low-power consumption, and cost that traditionally has been difficult to find in the video-processor market. The extensions allow the 5509A to deliver exceptional video codec performance with more than half its bandwidth available for performing additional functions such as color space conversion, user-interface operations, security, TCP/IP, voice recognition, and text-to-speech conversion. As a result, a single 5509A DSP can power most portable digital video applications with processing headroom to spare. For more information, see the TMS320C55x Hardware Extensions for Image/Video Applications Programmer‘s Reference (literature number SPRU098). For more information on using the the DSP Image Processing Library, see the TMS320C55x Image/Video Processing Library Programmer‘s Reference (literature number SPRU037).

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No design support from TI available

This product does not have ongoing design support from TI for new projects, such as new content or software updates. If available, you will find relevant collateral, software and tools in the product folder. You can also search for archived information in the TI E2ETM support forums.

Technical documentation

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Type Title Date
* Data sheet TMS320VC5509A Fixed-Point Digital Signal Processor datasheet (Rev. K) Jan. 22, 2008
* Errata TMS320VC5509A Digital Signal Processor Silicon Errata (Silicon Revs 1.0 and 1.1) (Rev. F) Sep. 20, 2010
* Errata TMS320VC5503/VC5506/VC5507/VC5509A Microstar BGA Discontinued and Redesigned May 21, 2020
Technical article Bringing the next evolution of machine learning to the edge Nov. 27, 2018
Technical article Industry 4.0 spelled backward makes no sense – and neither does the fact that you haven’t heard of TI’s newest processor yet Oct. 30, 2018
Application note High-Speed Interface Layout Guidelines (Rev. H) Oct. 11, 2018
Technical article How quality assurance on the Processor SDK can improve software scalability Aug. 22, 2018
Technical article Clove: Low-Power video solutions based on Sitara™ AM57x processors Jul. 21, 2016
User guide TMS320C55x DSP Peripherals Overview Reference Guide (Rev. K) Dec. 15, 2011
User guide TMS320VC5503/5507/5509 DSP Host Port Interface (HPI) Reference Guide (Rev. C) Jun. 11, 2009
Application note Board and System Design Considerations for the TMS320VC5503/06/07/09A DSPs Nov. 19, 2008
Application note Using the TMS320VC5506/C5507/C5509/C5509A USB Bootloader (Rev. C) Oct. 01, 2008
Application note Programming the TMS320VC5503/C5506/C5507/C5509/C5509A I2C Peripheral (Rev. A) Sep. 26, 2008
Application note Disabling the Internal Oscillator on the TMSVC5503/C5506/C5507/C5509/C5509A DSP (Rev. D) Sep. 09, 2008
Application note Using the USB APLL on the TMS320VC5506/C5507/C5509A (Rev. B) Sep. 09, 2008
Application note TMS320VC5503/VC5506/VC5507/C5509A Power Consumption Summary (Rev. C) Sep. 05, 2008
Application note Using the TMS320VC5503/C5506/C5507/C5509/C5509A Bootloader (Rev. F) Sep. 05, 2008
User guide TMS320VC5509 DSP MultiMediaCard / SD Card Controller Reference Guide (Rev. A) Sep. 30, 2007
User guide TMS320VC5503/5507/5509/5510 Direct Memory Access(DMA) Controller Reference Guide (Rev. E) Jan. 09, 2007
User guide TMS320VC5503/5507/5509/5510 DSP Timers Reference Guide (Rev. C) Apr. 11, 2006
User guide TMS320VC5501/5502/5503/5507/5509 DSP Inter-Integrated Circuit (I2C) Module RG (Rev. D) Oct. 17, 2005
User guide TMS320VC5501/5502/5503/5507/5509/5510 DSP (McBSP) Reference Guide (Rev. E) Apr. 14, 2005
Application note Recommended Power Solutions For TMS320C5509A/07/03 Mar. 28, 2005
User guide TMS320C55x DSP CPU Programmer's Reference Supplement (Rev. G) Feb. 24, 2005
User guide TMS320C55x Chip Support Library API Reference Guide (Rev. J) Sep. 15, 2004
Application note Migrating from TMS320VC5509 to TMS320VC5509A (Rev. C) Sep. 10, 2004
Application note TMS320VC5509A DSP Hardware Designer's Resource Guide Jun. 29, 2004
User guide TMS320VC5503/5507/5509 DSP Real-Time Clock (RTC) Reference Guide (Rev. B) Jun. 25, 2004
User guide TMS320VC5507/5509 DSP Analog-to-Digital Converter (ADC) Reference Guide (Rev. B) Jun. 25, 2004
User guide TMS320VC5507/5509 DSP Universal Serial Bus (USB) Module Reference Guide (Rev. A) Jun. 25, 2004
User guide TMS320VC5503/5507/5509 DSP External Memory Interface (EMIF) Reference Guide (Rev. A) Jun. 04, 2004
User guide TMS320C55x DSP CPU Reference Guide (Rev. F) Feb. 25, 2004
Application note Programming the TMS320VC5509 Multi Media Controller in Native Mode (Rev. A) Jun. 06, 2003
User guide TMS320C55x DSP Mnemonic Instruction Set Reference Guide (Rev. G) Oct. 11, 2002

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices.  The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2.  It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)


The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)


The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)


XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)


The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)


XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

Software development

TMS320C55x DSP Library (DSPLIB)
SPRC100 The DSP Library (DSPLIB) is a collection of high-level optimized DSP function modules for the C55x DSP platform. This source-code library includes C-callable functions (ANSI-C language compatible) for general signal processing math and vector functions that have been ported to C55x DSPs. The (...)
Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors
TELECOMLIB Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be acquired (...)


  • Telogy Software Line Echo Canceller (ECU)
  • Tone Detection Unit (TDU)
  • Caller ID Detection/Generation (CID)
  • Tone Generation Unit (TGU)
  • Voice Activity Detection Unit (VAU)
  • Noise Matching Functions
  • Packet Loss Concealment (PLC)
  • Voice Enhancement Unit (VEU)  


  • Fax Interface Unit (FIU)
  • Fax Modem (FM)
  • (...)
CODECS - Optimized for C55x Devices
C55XCODECS TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into audio and speech applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes (...)

C55x Codecs are optimized for use on any TM320C55x™ devices. C55x Codecs offer:

  • Free, object code with production licensing
  • WINDOWS installers
  • C55x Audio Codecs were tested on C5505 and C5510 devices
  • C55x Speech Codecs were tested on C5510 device
  • All codecs are eXpressDSP™ compliant
  • Performance data are (...)

Design tools & simulation

SPRM152.ZIP (91 KB) - IBIS Model
SPRM153A.ZIP (92 KB) - IBIS Model
SPRM154A.ZIP (6 KB) - BSDL Model
SPRM155A.ZIP (6 KB) - BSDL Model
Arm-based MPU, arm-based MCU and DSP third-party search tool
PROCESSORS-3P-SEARCH TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
  • Supports many TI processors including Sitara and Jacinto processors and DSPs
  • Search by type of product, TI devices supported, or country
  • Links and contacts for quick engagement
  • Third-party companies located around the world
SPRC170.ZIP (7 KB)
SPRC171.ZIP (6 KB)

CAD/CAE symbols

Package Pins Download
LQFP (PGE) 144 View options
NFBGA (GBB) 179 View options
NFBGA (ZAY) 179 View options

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  • Ongoing reliability monitoring

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