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TPS60501

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250-mA, 3.3-V High-Efficiency Step-Down Charge Pump

Data sheet
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250-mA, 3.3-V High-Efficiency Step-Down Charge Pump

TPS60501

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Product details

Parameters

Vin (Min) (V) 4.3 Vin (Max) (V) 6.5 Vout (Min) (V) 3.3 Vout (Max) (V) 3.3 Iout (Max) (A) 0.25 Regulated outputs (#) 1 Switching frequency (Min) (kHz) 600 Switching frequency (Max) (kHz) 1200 Iq (Typ) (mA) 0.04 Features Dynamic Voltage Scaling Operating temperature range (C) -40 to 85 Type Charge Pump Rating Catalog open-in-new Find other Charge pumps (inductorless)

Package | Pins | Size

VSSOP (DGS) 10 9 mm² 3 x 3 open-in-new Find other Charge pumps (inductorless)

Features

  • Wide Input Voltage Range From 1.8 V to 6.5 V
  • Regulated 3.3-V, 1.8-V, 1.5-V, or Adjustable
    Output Voltage
  • Up to 250-mA Output Current
  • Up to 90% Efficiency
  • Output Voltage Tolerance 3% Over Line, Load,
    and Temperature Variation
  • Device Quiescent Current Less Than 40 µA
  • Output Voltage Supervisor Included (Power Good)
  • Internal Soft Start
  • Load Isolated From Battery During Shutdown
  • Overtemperature and Overcurrent Protected
  • Micro-Small 10-Pin VSSOP Package
  • EVM Available, TPS60500EVM-193
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Description

The TPS6050x devices are a family of switched capacitor voltage converters, designed specifically for space-critical battery-powered applications.

The TPS6050x step-down charge pumps generate a regulated, fixed 3.3-V, 1.8-V, 1.5-V, or adjustable output voltage. Only four small ceramic capacitors are required to build a complete high-efficiency DC–DC charge pump converter. To achieve the high efficiency over a wide input voltage range, the charge pump automatically selects between three different conversion modes. The output can deliver a maximum of 250-mA output current. The power good function supervises the output voltage and goes high when the output voltage rises to 97% of the nominal value.

The TPS6050x devices come in a micro-small 10-pin VSSOP package.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet TPS6050x High-Efficiency, 250-mA Step-Down Charge Pump datasheet (Rev. C) Sep. 28, 2015
Application note Performing Accurate PFM Mode Efficiency Measurements (Rev. A) Dec. 11, 2018
Application note Extending the Soft Start Time Without a Soft Start Pin (Rev. B) Jun. 15, 2017
Technical articles Painting a picture for powering high-performance FPGAs Sep. 05, 2013
Technical articles Analog Applications Spotlight: Mark Pieper Jun. 06, 2013
Technical articles How to choose an LDO or switching regulator May 08, 2013
Technical articles Engineer It Video Series: Testing Power Supplies Mar. 26, 2013
Application note Choosing an Appropriate Pull-up/Pull-down Resistor for Open Drain Outputs Sep. 19, 2011
User guide TPS6050xEVM-193 Step-Down Charge Pump User's Guide Mar. 21, 2002

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
49
Description

The TPS60500EVM-193 is an evaluation tool for the high efficiency step-down charge pump TPS60500. The output voltage of the TPS60500 is adjustable in the range of 0.8 V to 3.3 V. On the EVM, the output voltage is set to 1.5 V. The TPS60500 operates from an input voltage of 1.8 V to 6.5 V. The input (...)

Features
  • Input Voltage: 2.5V to 6.5V
  • Output Voltage: 1.5V+/-3%
  • Output Current: up to 250mA
  • open-drain power good output

The TPS60500EVM-193 can also be used to evaluate the other devices of the TPS6050x family. The only change that is required is to replace the TPS60500 with the appropriate device and to (...)

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Design tools & simulation

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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
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GERBER FILE Download
SLVC143.ZIP (338 KB)

CAD/CAE symbols

Package Pins Download
VSSOP (DGS) 10 View options

Ordering & quality

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