TS12A4515

ACTIVE

12-V, 1:1 (SPST), 1-channel general-purpose analog switch (active low)

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Product details

Parameters

Configuration 1:1 SPST Number of channels (#) 1 Power supply voltage - single (V) 3.3, 5, 12 Ron (Typ) (Ohms) 6.5 ON-state leakage current (Max) (µA) 0.01 Bandwidth (MHz) 475 Operating temperature range (C) -40 to 85 Input/output continuous current (Max) (mA) 20 Rating Catalog CON (Typ) (pF) 19 Supply current (Typ) (uA) 20 open-in-new Find other Analog switches/muxes

Package | Pins | Size

PDIP (P) 8 93 mm² 9.81 x 9.43 SOIC (D) 8 19 mm² 3.91 x 4.9 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 open-in-new Find other Analog switches/muxes

Features

  • 2-V to 12-V Single-Supply Operation
  • Specified ON-State Resistance:
    • 15 Max With 12-V Supply
    • 20 Max With 5-V Supply
    • 50 Max With 3.3-V Supply
  • Specified Low OFF-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85°C
  • Low Charge Injection: 11.5 pC (12-V Supply)
  • Fast Switching Speed:
    tON = 80 ns, tOFF = 50 ns (12-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • TTL/CMOS-Logic Compatible With 5-V Supply

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Description

The TS12A4514/TS12A4515 are single pole/single throw (SPST), low-voltage, single-supply CMOS analog switches, with very low switch ON-state resistance. The TS12A4514 is normally open (NO). The TS12A4515 is normally closed (NC).

These CMOS switches can operate continuously with a single supply between 2 V and 12 V. Each switch can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 1 nA at 25°C or 10 nA at 85°C.

All digital inputs have 0.8-V to 2.4-V logic thresholds, ensuring TTL/CMOS-logic compatibility when using a 5-V supply.

For pin-compatible parts for use with dual supplies, see the TS12A4516/TS12A4517.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet Low-Voltage, Low ON-State Resistance SPST CMOS Analog Switches datasheet (Rev. D) Mar. 10, 2009
Application notes Selecting the Right Texas Instruments Signal Switch (Rev. B) Apr. 02, 2020
Application notes Multiplexers and Signal Switches Glossary Mar. 06, 2020
Technical articles Roll with the design punches and overcome power-sequencing challenges Jul. 29, 2019
Application notes Preventing Excess Power Consumption on Analog Switches Jul. 03, 2008
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.

The (...)

Features
  • Simplifies prototyping of SMT IC’s
  • Supports 6 common package types
  • Low Cost
INTERFACE ADAPTERS Download
document-generic User guide
10
Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


Reference designs

REFERENCE DESIGNS Download
DAC Sample and Hold Glitch Reduction Reference Design
TIPD142 DAC R-2R architectures display great performance in regards to noise and accuracy, but at a cost of large glitch area. This design focuses on the reduction of major-carry glitches that occur from code specific transitions in DAC R-2R architectures. This design reduces this glitch area, making it (...)
document-generic Schematic document-generic User guide
Design files

CAD/CAE symbols

Package Pins Download
PDIP (P) 8 View options
SOIC (D) 8 View options
SOT-23 (DBV) 5 View options

Ordering & quality

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