Product details

Protocols DDR2, DDR3, DDR4 Configuration 2:1 SPDT Number of channels (#) 12 Bandwidth (MHz) 6000 Supply voltage (Max) (V) 3.6 Supply voltage (Min) (V) 2.375 Ron (Typ) (Ohms) 8.3 Input/ouput voltage (Min) (V) 0 Input/ouput voltage (Max) (V) 3.3 Supply current (Typ) (uA) 40 ESD HBM (Typ) (kV) 3 Operating temperature range (C) -40 to 85 Crosstalk (dB) -68 ESD CDM (kV) 1 ICC (Typ) (uA) 40 COFF (Typ) (pF) 1 CON (Typ) (pF) 0.5 Off isolation (Typ) (dB) -34 OFF-state leakage current (Max) (µA) 5 Propagation delay (ns) 85 Ron (Max) (Ohms) 11.2 Ron channel match (Max) (Ohms) 1 RON flatness (Typ) (Ohms) 0.6 Turn off time (disable) (Max) (ns) 65 Turn on time (enable) (Max) (ns) 65 VIH (Min) (V) 1.4 VIL (Max) (V) 0.5
Protocols DDR2, DDR3, DDR4 Configuration 2:1 SPDT Number of channels (#) 12 Bandwidth (MHz) 6000 Supply voltage (Max) (V) 3.6 Supply voltage (Min) (V) 2.375 Ron (Typ) (Ohms) 8.3 Input/ouput voltage (Min) (V) 0 Input/ouput voltage (Max) (V) 3.3 Supply current (Typ) (uA) 40 ESD HBM (Typ) (kV) 3 Operating temperature range (C) -40 to 85 Crosstalk (dB) -68 ESD CDM (kV) 1 ICC (Typ) (uA) 40 COFF (Typ) (pF) 1 CON (Typ) (pF) 0.5 Off isolation (Typ) (dB) -34 OFF-state leakage current (Max) (µA) 5 Propagation delay (ns) 85 Ron (Max) (Ohms) 11.2 Ron channel match (Max) (Ohms) 1 RON flatness (Typ) (Ohms) 0.6 Turn off time (disable) (Max) (ns) 65 Turn on time (enable) (Max) (ns) 65 VIH (Min) (V) 1.4 VIL (Max) (V) 0.5
NFBGA (ZBA) 48 24 mm² 8 x 3
  • Wide VDD Range: 2.375 V – 3.6 V
  • High Bandwidth: 5.6 GHz Typical (single-ended); 6.0 GHz Typical (differential)
  • Low Switch On-Resistance (RON): 8 Ω Typical
  • Low Bit-to-Bit Skew: 3ps Typical; 6ps Max across All Channels
  • Low Crosstalk: –34 dB Typical at 1067 MHz
  • Low Operating Current: 40 µA Typical
  • Low-Power Mode with Low Current Consumption: 2 µA Typical
  • IOFF Protection Prevents Current Leakage in Powered Down State (VDD = 0 V)
  • Supports POD_12, SSTL_12, SSTL_15 and SSTL_18 Signaling
  • ESD Performance:
    • 3-kV Human Body Model (A114B, Class II)
    • 1-kV Charged Device Model (C101)
  • 8 mm x 3 mm 48-balls 0.65-mm Pitch ZBA Package
  • Wide VDD Range: 2.375 V – 3.6 V
  • High Bandwidth: 5.6 GHz Typical (single-ended); 6.0 GHz Typical (differential)
  • Low Switch On-Resistance (RON): 8 Ω Typical
  • Low Bit-to-Bit Skew: 3ps Typical; 6ps Max across All Channels
  • Low Crosstalk: –34 dB Typical at 1067 MHz
  • Low Operating Current: 40 µA Typical
  • Low-Power Mode with Low Current Consumption: 2 µA Typical
  • IOFF Protection Prevents Current Leakage in Powered Down State (VDD = 0 V)
  • Supports POD_12, SSTL_12, SSTL_15 and SSTL_18 Signaling
  • ESD Performance:
    • 3-kV Human Body Model (A114B, Class II)
    • 1-kV Charged Device Model (C101)
  • 8 mm x 3 mm 48-balls 0.65-mm Pitch ZBA Package

The TS3DDR4000 is 1:2 or 2:1 high speed DDR2/DDR3/DDR4 switch that offers 12-bit wide bus switching. The A port can be switched to the B or C port for all bits simultaneously. Designed for operation in DDR2, DDR3 and DDR4 memory bus systems, the TS3DDR4000 uses a proprietary architecture that delivers high bandwidth (single-ended –3dB bandwidth at 5.6 GHz), low insertion loss at low frequency, and very low propagation delay. The TS3DDR4000 is 1.8 V logic compatible, and all switches are bi-directional for added design flexibility. The TS3DDR4000 also offers a low-power mode, in which all channels become high-Z and the device consumes minimal power.

The TS3DDR4000 is 1:2 or 2:1 high speed DDR2/DDR3/DDR4 switch that offers 12-bit wide bus switching. The A port can be switched to the B or C port for all bits simultaneously. Designed for operation in DDR2, DDR3 and DDR4 memory bus systems, the TS3DDR4000 uses a proprietary architecture that delivers high bandwidth (single-ended –3dB bandwidth at 5.6 GHz), low insertion loss at low frequency, and very low propagation delay. The TS3DDR4000 is 1.8 V logic compatible, and all switches are bi-directional for added design flexibility. The TS3DDR4000 also offers a low-power mode, in which all channels become high-Z and the device consumes minimal power.

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Technical documentation

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Type Title Date
* Data sheet TS3DDR4000 12-bits 1:2 high speed DDR2/DDR3/DDR4 switch/multiplexer datasheet (Rev. C) PDF | HTML 18 Mar 2019
More literature Mipi Switches PDF | HTML 14 Jan 2022
Technical article Memory switches bring reliability and speed to clouding computing 05 Jan 2016
EVM User's guide TS3DDR4000 EVM User Guide 20 Feb 2015
Application note Preventing Excess Power Consumption on Analog Switches 03 Jul 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design & development

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Evaluation board

TS3DDR4000-EVM — TS3DDR4000 evaluation module

The TS3DDR4000-EVM is an evaluation module for TI’s 12-bit high-speed DDR2, DDR3 and DDR4 switch/multiplexer.  The module lets you easily evaluate functional switching and logic implementation.

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Simulation model

TS3DDR4000 HSpice Model TS3DDR4000 HSpice Model

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NFBGA (ZBA) 48 View options

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