Comparator With Output Voltage-Level Translation


Product details


Number of channels (#) 1 Output type Open-drain Propagation delay time (µs) 0.7 Vs (Max) (V) 5.5 Vs (Min) (V) 2.5 Vos (offset voltage @ 25 C) (Max) (mV) 10 Iq per channel (Typ) (mA) 0.005 Input bias current (+/-) (Max) (nA) 500 Rail-to-rail No Rating Catalog Operating temperature range (C) -40 to 85 Features VICR (Max) (V) 5.5 VICR (Min) (V) 0.8 open-in-new Find other Comparators

Package | Pins | Size

SOT-5X3 (DRL) 6 2 mm² 1.65 x 1.2 open-in-new Find other Comparators


  • Low Supply Current: 8 µA (Max)
  • Supply Voltage: 2.5 V to 5.5 V
  • Output FET Provides Down Translation
  • Small Package: SOT-563
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance
    • 2500-V Human-Body Model (JESD-A114E)
    • 250-V Machine Model
      (EIA/JESD A115-A)
    • 1500-V Charged-Device Model (JESD22-C101-A Level III)

open-in-new Find other Comparators


The TXS03121 is a comparator designed for battery monitoring applications. It can be operated with a voltage of 2.5 V to 5.5 V. The reference voltage is applied to the –IN terminal, whereas the voltage to be monitored is connected to +IN. When the voltage at +IN is greater than the voltage at –IN, the output FET is turned On. When the voltage at +IN is less than the voltage at –IN, the output FET is turned Off. The source (S) of the output FET can be connected to 1.1 V to 3.6 V, which allows the output signal to be level translated to another voltage value. The voltage at V+ must be greater than or equal to the voltage at S. The voltage at S must be greater than or equal to the voltage at D (V+ ≥ VS ≥ VD).

open-in-new Find other Comparators

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 3
Type Title Date
* Datasheet Comparator With Output Voltage-Level Translation datasheet (Rev. A) Jan. 06, 2009
White papers The Signal e-book: A compendium of blog posts on op amp design topics Mar. 28, 2017
Technical articles Op Amps used as Comparators—is it okay? Mar. 14, 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
SOT-5X3 (DRL) 6 View options

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​


Related videos