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Product details

Parameters

Number of channels (#) 1 Power switch MOSFET, IGBT Peak output current (A) 6 Input VCC (Min) (V) 4.7 Input VCC (Max) (V) 18 Features Thermal Shutdown Operating temperature range (C) 0 to 70 Rise time (ns) 25 Fall time (ns) 20 Prop delay (ns) 35 Input threshold CMOS Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog open-in-new Find other Low-side drivers

Package | Pins | Size

PDIP (P) 8 93 mm² 9.81 x 9.43 SOIC (DW) 16 77 mm² 10.3 x 7.5 TO-220 (KC) 5 86 mm² 8.51 x 10.16 open-in-new Find other Low-side drivers

Features

  • Totem Pole Output with 6A Source/Sink Drive
  • 3ns Delay
  • 20ns Rise and Fall Time into 2.2nF
  • 8ns Rise and Fall Time into 30nF
  • 4.7V to 18V Operation
  • Inverting and Non-Inverting Outputs
  • Under-Voltage Lockout with Hysteresis
  • Thermal Shutdown Protection
  • MINIDIP and Power Packages
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Description

The UC1710 family of FET drivers is made with a high-speed Schottky process to interface between low-level control functions and very high-power switching devices-particularly power MOSFET\x92s. These devices accept low-current digital inputs to activate a high-current, totem pole output which can source or sink a minimum of 6A.

Supply voltages for both VIN and VC can independently range from 4.7V to 18V. These devices also feature under-voltage lockout with hysteresis.

The UC1710 is packaged in an 8-pin hermetically sealed dual in-line package for \x9655°C to +125°C operation. The UC2710 and UC3710 are specified for a temperature range of \x9640°C to +85°C and 0°C to +70°C respectively and are available in either an 8-pin plastic dual in-line or a 5-pin, TO-220 package. Surface mount devices are also available.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 8
Type Title Date
* Datasheet High Current FET Driver datasheet Sep. 05, 1999
Application notes External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application notes Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) Oct. 29, 2018
Technical articles How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Technical articles How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical articles Boosting efficiency for your solar inverter designs May 24, 2018
Technical articles How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018

Design & development

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Design tools & simulation

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CAD/CAE symbols

Package Pins Download
PDIP (P) 8 View options
SOIC (DW) 16 View options
TO-220 (KC) 5 View options

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