500 mW, high efficiency 3 kVrms isolated DC-DC converter
Product details
Parameters
Package | Pins | Size
Features
- High-efficiency DC-DC converter with integrated transformer technology
- Meets CISPR32 Class B EMI limits without ferrite beads across entire load range on a 2-layer PCB
- Robust isolation barrier:
- Isolation rating: 3 kVRMS
- Surge capability: 8 kVPK
- Working voltage: 850 VRMS
- CMTI (typical): ±100 V/ns
- Output power (typical): 500-mW
- Regulated 5.0-V or 3.3-V output with selectable 400-mV headroom voltage to power an LDO
- Input voltage: 4.5 V to 5.5 V
- Short circuit recovery
- Thermal shutdown
- 16-pin wide-body SOIC package with > 8-mm creepage and clearance
- Extended temperature range: –40ºC to 125ºC
- Planned safety-related certifications:
- 3000-VRMS isolation for 1 minute per UL 1577
- CSA certification per IEC 60950-1, IEC 62368- 1 and IEC 60601-1 end equipment standards
- CQC approval per GB4943.1-2011
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Description
UCC12040 is a DC/DC converter with 3-kVRMS basic isolation rating designed to provide efficient, isolated power to isolated circuits that require a bias supply with a well-regulated output voltage. The device integrates a transformer and DC/DC controller with a proprietary architecture to provide 500 mW (typical) of isolated power with high efficiency and low EMI.
The UCC12040 integrates protection features for increased system robustness. The device also has an enable pin, synchronization capability, and regulated 5-V or 3.3-V output options with headroom. The UCC12040 is a low-profile, miniaturized solution offered in a wide-body SOIC package with 2.65-mm height (typical).
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | UCC12040 High-Efficiency, Low-EMI, 3-kVRMS Basic Isolation DC-DC Converter datasheet (Rev. A) | Apr. 17, 2020 |
Application note | Expanding Analog Input Channels in Grid Applications (Using 16-Channel, 16-Bit, (Rev. A) | Feb. 26, 2021 | |
User guide | UCC12050EVM-022 User's Guide (Rev. B) | Jan. 12, 2021 | |
White paper | Fundamentals of EMI Requirements for an Isolated DC/DC Converter | Jan. 07, 2021 | |
Application note | Topology Selection for Isolated Power Supplies in Patient Monitor (Rev. A) | Sep. 02, 2020 | |
White paper | Understanding the trade-offs and technologies to increase power density | Jul. 02, 2020 | |
Application note | Introduction to HVDC Architecture and Solutions for Control and Protection (Rev. A) | Jun. 01, 2020 | |
White paper | 絶縁バリアを通過する電力:絶縁DC/DCバイアス電源の状況 | Jan. 28, 2020 | |
White paper | Power Through the Isolation Barrier: The Landscape of Isolated DC/DC Bias Power | Dec. 11, 2019 | |
Application note | A Reinforced-isolated Analog Input Chain for Space-constrained Applications | Sep. 01, 2019 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Easily validate all available output voltage selections
- Test points for accurate ripple and transient response waveforms
- EVM layout provides example of proper board layout for rated isolation and EMI perfomance
- High efficiency, isoated power transfer of up to 500mW
- Design is tested and provides all the (...)
Reference designs
Design files
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SO-MOD (DVE) | 16 | View options |
Ordering & quality
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- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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