SN74LV125A-Q1

Name: SN74LV125A-Q1
Brand: TI
SKU: SN74LV125A-Q1
Price: 0.178 USD

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4-Kanal-Puffer, 2 bis 5,5 V, mit Tri-State-Ausgängen für die Automobilindustrie

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Datenblatt

document-pdfAcrobat SN74LV125A-Q1, Quadruple Bus Buffer Gates With 3-State Outputs datasheet (Englisch)

SN74LV125A-Q1

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Datenblatt

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Produktdetails

Technology family

LV-A

Supply voltage (min) (V)

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-16

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Automotive

Operating temperature range (°C)

-40 to 125

Technology family

LV-A

Supply voltage (min) (V)

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-16

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Automotive

Operating temperature range (°C)

-40 to 125

VQFN (RGY)

12.25 mm² 3.5 x 3.5

Qualified for Automotive Applications
2-V to 5.5-V V_CC Operation
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2.3 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All Ports
I_off Supports Partial-Power-Down Mode Operation

Qualified for Automotive Applications
2-V to 5.5-V V_CC Operation
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2.3 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All Ports
I_off Supports Partial-Power-Down Mode Operation

The SN74LV125A-Q1 quadruple bus buffer gate is designed for 2-V to 5.5-V V_CC operation.

This device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

The SN74LV125A-Q1 quadruple bus buffer gate is designed for 2-V to 5.5-V V_CC operation.

This device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

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Technische Dokumentation

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Top-Dokumentation	Typ	Titel	Format-Optionen	Datum
*	Data sheet	SN74LV125A-Q1, Quadruple Bus Buffer Gates With 3-State Outputs datasheet		01 Okt 2010
	More literature	Automotive Logic Devices Brochure		27 Aug 2014

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