Información de empaque
Encapsulado | Pines CPGA (GB) | 181 |
Rango de temperatura de funcionamiento (℃) -55 to 210 |
Cant. de paquetes | Transportador 21 | JEDEC TRAY (5+1) |
Características para SM320F28335-HT
- High-Performance Static CMOS Technology
- Up to 150 MHz for TC = 55°C to 125°C
and Up to 100 MHZ for TC = 210°C - 1.9-V Core, 3.3-V I/O Design
- Up to 150 MHz for TC = 55°C to 125°C
- High-Performance 32-Bit CPU
- IEEE-754 Single-Precision Floating-Point Unit (FPU))
- 16 × 16 and 32 × 32 MAC Operations
- 16 × 16 Dual MAC
- Harvard Bus Architecture
- Fast Interrupt Response and Processing
- Unified Memory Programming Model
- Code-Efficient (in C/C++ and Assembly)
- Six Channel DMA Controller (for ADC, McBSP,
ePWM, XINTF, and SARAM) - 16-bit or 32-bit External Interface (XINTF)
- Over 2M × 16 Address Reach
- On-Chip Memory
- 256K × 16 Flash, 34K × 16 SARAM
- 1K × 16 OTP ROM
- Boot ROM (8K x 16)
- With Software Boot Modes (via SCI, SPI, CAN,
I2C, McBSP, XINTF, and Parallel I/O) - Standard Math Tables
- With Software Boot Modes (via SCI, SPI, CAN,
- Clock and System Control
- Dynamic PLL Ratio Changes Supported
- On-Chip Oscillator
- Watchdog Timer Module
- GPIO0 to GPIO63 Pins Can Be Connected to One
of the Eight External Core Interrupts - Peripheral Interrupt Expansion (PIE) Block
That Supports All 58 Peripheral Interrupts - 128-Bit Security Key/Lock
- Protects Flash/OTP/RAM Blocks
- Prevents Firmware Reverse Engineering
- Enhanced Control Peripherals
- Up to 18 PWM Outputs
- Up to 6 HRPWM Outputs With 150 ps MEP Resolution
- Up to 6 Event Capture Inputs
- Up to 2 Quadrature Encoder Interfaces
- Up to 8 32-bit/Nine 16-bit Timers
- Three 32-Bit CPU Timers
- Serial Port Peripherals
- Up to 2 CAN Modules
- Up to 3 SCI (UART) Modules
- Up to 2 McBSP Modules (Configurable as SPI)
- One SPI Module
- One Inter-Integrated-Circuit (I2C) Bus
- 12-Bit ADC, 16 Channels
- 80-ns Conversion Rate
- 2 × 8 Channel Input Multiplexer
- Two Sample-and-Hold
- Single/Simultaneous Conversions
- Internal or External Reference
- Up to 88 Individually Programmable, Multiplexed
GPIO Pins With Input Filtering - JTAG Boundary Scan Support IEEE Standard 1149.1-1990
Standard Test Access Port and Boundary Scan Architecture - Advanced Emulation Features
- Analysis and Breakpoint Functions
- Real-Time Debug via Hardware
- Development Support Includes
- ANSI C/C++ Compiler/Assembler/Linker
- Code Composer Studio IDE
- DSP/BIOS
- Digital Motor Control and Digital Power
Software Libraries
- Low-Power Modes and Power Savings
- IDLE, STANDBY, HALT Modes Supported
- Disable Individual Peripheral Clocks
- Package Option
- Ceramic Pin Grid Array (GB)
- HLQFP (PTP)
- Temperature Range:
- GB Package: –55°C to 210°C (GB)
- PTP Package: –55°C to 150°C (PTP)
- APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Extreme (–55°C/210°C)
Temperature Range(1) - Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability
- Texas Instruments high temperature products utilize
highly optimized silicon (die) solutions with design
and process enhancements to maximize performance over
extended temperatures.
(1) Custom temperature ranges available
Descripción de SM320F28335-HT
The SM320F28335 is a highly integrated, high-performance solution for demanding control applications.
Throughout this document, the device is abbreviated as F28335.