Información de empaque
| Encapsulado | Pines SOIC (D) | 8 |
| Rango de temperatura de funcionamiento (℃) |
| Cant. de paquetes | Transportador 2,500 | LARGE T&R |
Características para UCC384
- Precision Negative Series Pass Voltage Regulation
- 0.2 V Dropout at 0.5 A
- Wide Input Voltage Range –3.2 V to –15 V
- Low Quiescent Current Irrespective of Load
- Simple Logic Shutdown Interfacing
- –5 V, –12 V, and Adjustable Output
- 2.5% Duty Cycle Short Circuit Protection
Descripción de UCC384
The UCC384-x family of negative linear-series pass regulators is tailored for low-dropout applications where low-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-output differential applications, the UCC384-x passes 0.5 A while requiring only 0.2 V of input-voltage headroom. Dropout voltage decreases linearly with output current, so that dropout at 50 mA is less than 20 mV.
Quiescent current consumption for the device under normal (non-dropout) conditions is typically 200 uA. An integrated charge pump is internally enabled only when the device is operating near dropout with low VIN. This ensured that the device meets the dropout specifications even for maximum load current and a VIN of –3.2 V with only a modest increase in quiescent current. Quiescent current is always less than 350 uA, with the charge pump enabled. The quiescent current of the UCC384 does not increase with load current.
Short-circuit current is internally limited. The device responds to a sustained overcurrent condition by turning off after a tON delay. The device then stays off for a period, tOFF, that is 40 times the tON delay. The device then begins pulsing on and off at the tON/tOFF duty cycle of 2.5%. This drastically reduces the power dissipation during short circuit such that heat sinking, if at all required, must only accommodate normal operation. An external capacitor sets the on time. The off time is always 40 times tON.
The UCCx84-x can be shutdown to 45 uA (maximum) by pulling the SD/CT pin more positive than –0.7 V. To allow for simpler interfacing, the SD/CT pin may be pulled up to 6 V above the ground pin without turning on clamping diodes.
Internal power dissipation is further controlled with thermal-overload protection circuitry. Thermal shutdown occurs if the junction temperature exceeds 140°C. The chip remains off until the temperature has dropped 20°C (TJ = 120°C).