홈 인터페이스 고속 시리얼라이저/디시리얼라이저 FPD-Link 시리얼라이저/디시리얼라이저
홈
인터페이스
고속 시리얼라이저/디시리얼라이저
FPD-Link 시리얼라이저/디시리얼라이저

DS90C3202

마지막 구매

3.3V 8MHz~135MHz 듀얼 FPD-Link 리시버

지금 주문
데이터 시트

DS90C3202

마지막 구매
데이터 시트 지금 주문

제품 상세 정보

Function Deserializer Color depth (bpp) 30 Input compatibility FPD-Link LVDS Output compatibility LVCMOS Features Low-EMI Point-to-Point Communication Applications In-vehicle Infotainment (IVI) Rating Catalog Operating temperature range (°C) 0 to 70
Function Deserializer Color depth (bpp) 30 Input compatibility FPD-Link LVDS Output compatibility LVCMOS Features Low-EMI Point-to-Point Communication Applications In-vehicle Infotainment (IVI) Rating Catalog Operating temperature range (°C) 0 to 70
TQFP (PDT) 128 256 mm² 16 x 16
  • Up to 9.45 Gbit/s data throughput
  • 8 MHz to 135 MHz input clock support
  • Supports up to QXGA panel resolutions
  • Supports HDTV panel resolutions and frame rates up to 1920 x 1080p
  • LVDS 30-bit, 24-bit or 18-bit color data inputs
  • Supports single pixel and dual pixel interfaces
  • Supports spread spectrum clocking
  • Two-wire serial communication interface
  • Programmable clock edge and control strobe select
  • Power down mode
  • +3.3V supply voltage
  • 128-pin TQFP Package
  • Compliant to TIA/EIA-644-A-2001 LVDS Standard

All trademarks are the property of their respective owners.

  • Up to 9.45 Gbit/s data throughput
  • 8 MHz to 135 MHz input clock support
  • Supports up to QXGA panel resolutions
  • Supports HDTV panel resolutions and frame rates up to 1920 x 1080p
  • LVDS 30-bit, 24-bit or 18-bit color data inputs
  • Supports single pixel and dual pixel interfaces
  • Supports spread spectrum clocking
  • Two-wire serial communication interface
  • Programmable clock edge and control strobe select
  • Power down mode
  • +3.3V supply voltage
  • 128-pin TQFP Package
  • Compliant to TIA/EIA-644-A-2001 LVDS Standard

All trademarks are the property of their respective owners.

The DS90C3202 is a 3.3V single/dual FPD-Link 10-bit color receiver is designed to be used in Liquid Crystal Display TVs, LCD Monitors, Digital TVs, and Plasma Display Panel TVs. The DS90C3202 is designed to interface between the digital video processor and the display device using the low-power, low-EMI LVDS (Low Voltage Differential Signaling) interface. The DS90C3202 converts up to ten LVDS data streams back into 70 bits of parallel LVCMOS/LVTTL data. The receiver can be programmed with rising edge or falling edge clock. Optional wo-wire serial programming allows fine tuning in development and production environments. With an input clock at 135 MHz, the maximum transmission rate of each LVDS line is 945 Mbps, for an aggregate throughput rate of 9.45 Gbps (945 Mbytes/s). This allows the dual 10-bit LVDS Receiver to support resolutions up to HDTV.

The DS90C3202 is a 3.3V single/dual FPD-Link 10-bit color receiver is designed to be used in Liquid Crystal Display TVs, LCD Monitors, Digital TVs, and Plasma Display Panel TVs. The DS90C3202 is designed to interface between the digital video processor and the display device using the low-power, low-EMI LVDS (Low Voltage Differential Signaling) interface. The DS90C3202 converts up to ten LVDS data streams back into 70 bits of parallel LVCMOS/LVTTL data. The receiver can be programmed with rising edge or falling edge clock. Optional wo-wire serial programming allows fine tuning in development and production environments. With an input clock at 135 MHz, the maximum transmission rate of each LVDS line is 945 Mbps, for an aggregate throughput rate of 9.45 Gbps (945 Mbytes/s). This allows the dual 10-bit LVDS Receiver to support resolutions up to HDTV.
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* Data sheet DS90C3202 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver datasheet (Rev. D) 2013/04/12

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치