Product details

Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
PLCC (FN) 28 155.0025 mm² 12.45 x 12.45 SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • Power Dissipation...40 mW Max
  • Advanced LinEPIC™ Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and µP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 µs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.

  • Power Dissipation...40 mW Max
  • Advanced LinEPIC™ Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and µP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 µs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.

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* Data sheet 10-Bit Analog-to-Digital Converters With Parallel Outputs datasheet (Rev. G) 30 Oct 2003
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 21 May 2015
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 17 Mar 2011

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PLCC (FN) 28 View options
SOIC (DW) 24 View options

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