AM2754-Q1
- Dual or Quad-core Arm Cortex R5F CPU with each core running up to 1 GHz
- 32KB I-Cache with 64-bit ECC per CPU core
- 4x8KB association
- Single Error Correction, Double Error Detection ECC protected per 64 bits
- 32KB D-cache with 64-bit ECC per CPU core
- 4x8KB association
- Single Error Correction, Double Error Detection ECC protected per 64 bits
- 64KB Tightly Coupled Memory (TCM) per core, with 32-bit ECC
- Single Error Correction, Double Error Detection ECC protected per 64 bits
- Two Banks, A and B, 32KB each
- Bank B split into B0 and B1, 16KB each
- 128KB TCM for CPU0 in lockstep mode
- Up to 128KB Remote L2 Cache
- 32B cache line
- Up to 128KB L2 cache covering up to 16MB cacheable space
- Read only, 8-way cache
- Fast Local Copy (FLC) support
- For each cluster, lockstep or independent dual core operation supported
- 32KB I-Cache with 64-bit ECC per CPU core
- Single or Dual C7x DSP core with each core running up to 1GHz
- L1 memory architecture
- 32KB I-Cache per core
- 64KB D-Cache per core
- L2 memory architecture
- 2.25MB with ECC protection on L2 SRAM
- 2MB "Main" segment
- 256KB "Auxiliary" segment
- 2.25MB with ECC protection on L2 SRAM
- Matrix Multiply Accelerator Version 3f (MMA3F) on DSP0
- L1 memory architecture
- 2x Asynchronous Audio Sample Rate Converter (ASRC)
- 140dB Signal-to-Noise ratio (SNR)
- Up to 8 pairs of input and output streams (up to 16 channels total) per ASRC
- Input and output sample rates from 8KHz to 216KHz
- 16-, 18-, 20-, 24-bit data input/output
Memory Subsystem:
- Up to 6MB of On-Chip Shared SRAM
-
Remote Low latency L2 cache (RL2), software programmable, allocated from SRAM
- 432KB of On-Chip SRAM in SMS Subsystem
- 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
- 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
- 2 × Flash Sub Systems (FSS) that support Octal Serial Peripheral Interface (OSPI) at up to 166MHz SDR and 166MHz DDR at 1.8V and 3.3V with full XIP (eXecute In Place) which can be used for
- 1x FSS supporting OSPI OptiFlash memory technology, Firmware Over-The-Air upgrades (FOTA), and On The Fly Advanced Encryption Standard (OTFA)
- 1x FSS supporting OSPI or HyperRAM
- RAM expansion
- 1 × 8-bit Multi-Media Card/Secure Digital (eMMC/SD) interface
- 5 × Multichannel Audio Serial Ports (McASP)
- Transmit and Receive Clocks up to 50MHz
- Up to 26 Serial Data Pins across 5x McASP with Independent TX and RX Clocks
- Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S) and Similar Formats
- Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
- FIFO Buffers for Transmit and Receive (256 Bytes)
- Support for audio reference output clock
- 8 × Universal Asynchronous RX-TX (UART) modules
- 5 × Serial Peripheral Interface (SPI) controllers
- 8 × Inter-Integrated Circuit (I2C) ports
- 5 × Modular Controller Area Network (MCAN) modules with CAN-FD support
- 3 × Enhanced Pulse Width Modulation (ePWM) modules
- 6 × Enhanced Capture (ECAP) modules
- 1 × 12-bit Analog to Digital Converters (ADC) with 4MSPS maximum sampling rate
- Up to 167 General Purpose I/O (GPIO)
- Integrated Ethernet Switch supporting (total 2 external ports)
- RMII (10/100) or RGMII (10/100/1000)
- IEEE 1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
- Supports 802.1Qav (eAVB)
- Clause 45 MDIO PHY management
- Packet Classifier based on ALE engine with 512 classifiers
- Priority flow control
- Four CPU hardware interrupt pacing
- IP/ UDP/ TCP checksum offload in hardware
- USB 2.0
- Port configurable as USB host, USB device, or USB Dual-Role device
- Integrated USB VBUS detection
- Hardware Security Module (HSM)
- Dedicated dual-core ARM Cortex-M4F Security co-processor with dedicated interconnect for security
- Dedicated security DMA and IPC subsystem for isolated processing
- Secure boot support
- Hardware-enforced Root-of-Trust (RoT)
- Support to switch RoT via backup key
- Support for takeover protection, IP protection, and anti-roll back protection
- Cryptographic acceleration supported
- Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
- Supports cryptographic cores
- AES - 128/192/256-bit key sizes
- SHA2 - 224/256/384/512-bit support
- DRBG with true random number generator
- PKA (Public Key Accelerator) to Assist in RSA/ECC processing: RSA-4096 bits, ECDSA, SM2DSA, Curve25519/448
- Supports Chinese crypto algorithms: SM3 and SM4
- DMA support
- Debugging security
- Secure software controlled debug access
- Security aware debugging
- Trusted Execution Environment (TEE) supported
- Arm TrustZone based TEE
- Extensive firewall support for isolation
- Secure watchdog/timer/IPC
- Secure storage support
- On-the-Fly encryption and support for OSPI interface in XIP mode
- Functional Safety-Compliant targeted [Automotive]
- Developed for functional safety applications
- Documentation to be made available to aid ISO 26262 functional safety system design
- Systematic capability up to ASIL-D targeted
- Hardware integrity up to ASIL-B targeted
- Safety-related certification
- ISO 26262 planned
- Power modes supported by Device Manager:
- Active
- Standby
- IO Retention
- UART
- I2C EEPROM
- OSPI NOR/NAND Flash
- SD Card
- eMMC
- USB (host) Mass Storage
- USB (device) boot from external host (DFU mode)
- Ethernet
- AEC-Q100 qualified for automotive applications
- 16-nm FinFET technology
- 15.8mm x 15.8mm, 0.8mm pitch 361-pin FCCSP
The AM275x family of highly-integrated, high-performance microcontrollers is based on the Arm Cortex R5F and C7x floating point DSP cores. The microcontrollers enable original equipment manufacturers (OEM) and original design manufacturers (ODM) to quickly bring to market devices with robust software support and rich user interfaces. The device offers the maximum flexibility of a fully integrated, mixed processor design
Key features and benefits:
- Extensive audio interfacing with 5x McASP peripherals
- Peripherals supporting system level connectivity such as 2-port Gigabit Ethernet, USB, OSPI/QSPI, CAN-FD, UARTs, SPI and GPIOs.
- Supports the latest cybersecurity requirements with the built-in Hardware Security Module (HSM).
- One or two dual-core R5F clusters with 128KB TCM per cluster (64KB per core) and up to two C7x DSP cores with 2.25MB of L2 SRAM per C7x DSP, greatly reducing the need for external memory.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | AM275x Signal Processing Microcontrollers datasheet | PDF | HTML | 2024年 12月 13日 |
* | Errata | AM275x Errata | PDF | HTML | 2024年 9月 30日 |
* | User guide | AM275x Techincal Reference Manual | 2024年 12月 13日 | |
EVM User's guide | AM275x Evaluation Module User's Guide (Rev. B) | PDF | HTML | 2025年 3月 7日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
AUDIO-AM275-EVM — AM275x 音訊評估模組
DP83867-EVM-AM — 適用於工業乙太網路 PHY 附加電路板的 AM2x 及 AM6x 評估模組
DP83867-EVM-AM 是一款工業乙太網路 PHY 附加電路板,可搭配 Arm-b高性能微控制器評估模組使用。此附加電路板是使用 EVM 進行初始乙太網路評估與原型設計的絕佳選擇。DP83867-EVM-AM 配備了有 RGMII 介面的 TI DP83867IR 低延遲 10/100/1000-Mbps PHY,以及標準 RJ45 乙太網路連網連接器。具有乙太網路擴充連接器的 EVM (如 AUDIO-AM275-EVM) 支援 DP83867-EVM-AM。
AM275-FREERTOS-SDK — FreeRTOS SDK for AM275 – RTOS, No-RTOS
支援產品和硬體
產品
數位訊號處理器 (DSP)
硬體開發
開發板
AM275X-RESTRICTED-DOCS-ADVANCE — AM275 Hardware Design Guidelines and Schematic Checklist
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TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud
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產品
Arm Cortex-M0+ MCU
MSP430 微控制器
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Arm 式處理器
C2000 即時微控制器
數位訊號處理器 (DSP)
Sub-1 GHz 無線 MCU
低耗電 2.4-GHz 產品
汽車無線連線產品
汽車 mmWave 雷達感測器
工業 mmWave 雷達感測器
硬體開發
子卡
C7000-CGT — C7000 code generation tools (CGT) - compiler
The TI C7000 C/C++ Compiler Tools support development of applications for TI C7000 Digital Signal Processor cores.
Code Composer Studio is the Integrated Development Environment (IDE) for TI embedded devices. If you are looking to develop on a TI embedded device it is recommended to start (...)
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產品
Arm 式處理器
數位訊號處理器 (DSP)
C7000-SAFETI-CQKIT-RV — C7000 safety compiler qualification kit (leverages compiler release validations)
The Safety Compiler Qualification Kit was developed to assist customers in qualifying their use of the TI ARM, C6000, C7000 or C2000/CLA C/C++ Compiler to functional safety standards such as IEC 61508 and ISO 26262.
The Safety Compiler Qualification Kit:
- is free of charge for TI customers
- does (...)
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產品
Arm 式處理器
數位訊號處理器 (DSP)
CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)
Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.
(...)
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此設計資源支援此類別中多數產品。
檢查產品詳細資料頁面以確認支援。
-
parametric-filter 數位訊號處理器 (DSP) -
parametric-filter Arm 式處理器 -
parametric-filter MSP430 微控制器 -
parametric-filter C2000 即時微控制器 -
parametric-filter Arm 式微控制器 -
parametric-filter 訊號調節器 -
parametric-filter mmWave 雷達感測器 -
parametric-filter Wi-Fi 產品 -
parametric-filter Sub-1 GHz 產品 -
parametric-filter 數位電源隔離式控制器
SYSCONFIG — Standalone desktop version of SysConfig
SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.
SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)
支援產品和硬體
產品
汽車 mmWave 雷達感測器
數位訊號處理器 (DSP)
C2000 即時微控制器
Wi-Fi 產品
Arm 式處理器
工業 mmWave 雷達感測器
Arm Cortex-M4 MCU
Arm Cortex-M0+ MCU
Arm Cortex-R MCU
Sub-1 GHz 無線 MCU
汽車無線連線產品
低耗電 2.4-GHz 產品
AM27X-ACADEMY — AM27x Academy
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產品
Arm Cortex-R MCU
數位訊號處理器 (DSP)
軟體
軟體開發套件 (SDK)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
UNKNOWN (ANJ) | 361 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
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- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。