DS90UR903Q-Q1

現行

10 - 43MHz 18 位元色彩 FPD-Link II 串聯器

產品詳細資料

Function Serializer Color depth (bps) 18 Input compatibility LVCMOS Output compatibility FPD-Link LVDS Features I2C Config Applications In-vehicle Infotainment (IVI) EMI reduction BIST Diagnostics I2C Bus Rating Automotive Operating temperature range (°C) -40 to 105
Function Serializer Color depth (bps) 18 Input compatibility LVCMOS Output compatibility FPD-Link LVDS Features I2C Config Applications In-vehicle Infotainment (IVI) EMI reduction BIST Diagnostics I2C Bus Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RTA) 40 36 mm² 6 x 6
  • 10 MHz to 43 MHz Input PCLK Support
  • 210 Mbps to 903 Mbps Data Throughput
  • Single Differential Pair Interconnect
  • Embedded Clock with DC Balanced Coding to
    Support AC-coupled Interconnects
  • Capable to Drive up to 10 meters Shielded
    Twisted-Pair
  • I2C Compatible Serial Interface
    for Device Configuration
  • Single Hardware Device Addressing Pin
  • LOCK Output Reporting Pin to Validate Link
    Integrity
  • Integrated Termination Resistors
  • 1.8V- or 3.3V-compatible Parallel Bus Interface
  • Single Power Supply at 1.8V
  • ISO 10605 ESD and IEC 61000-4-2 ESD Compliant
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • Temperature Range −40°C to +105°C
  • No Reference Clock Required on Deserializer
  • Programmable Receive Equalization
  • EMI/EMC Mitigation
    • DES Programmable Spread Spectrum (SSCG) outputs
    • DES Receiver Staggered Outputs
  • 10 MHz to 43 MHz Input PCLK Support
  • 210 Mbps to 903 Mbps Data Throughput
  • Single Differential Pair Interconnect
  • Embedded Clock with DC Balanced Coding to
    Support AC-coupled Interconnects
  • Capable to Drive up to 10 meters Shielded
    Twisted-Pair
  • I2C Compatible Serial Interface
    for Device Configuration
  • Single Hardware Device Addressing Pin
  • LOCK Output Reporting Pin to Validate Link
    Integrity
  • Integrated Termination Resistors
  • 1.8V- or 3.3V-compatible Parallel Bus Interface
  • Single Power Supply at 1.8V
  • ISO 10605 ESD and IEC 61000-4-2 ESD Compliant
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • Temperature Range −40°C to +105°C
  • No Reference Clock Required on Deserializer
  • Programmable Receive Equalization
  • EMI/EMC Mitigation
    • DES Programmable Spread Spectrum (SSCG) outputs
    • DES Receiver Staggered Outputs

The DS90UR903Q/DS90UR904Q chipset offers a FPD-Link II interface with a high-speed forward channel for data transmission over a single differential pair. The Serializer/ Deserializer pair is targeted for direct connections between graphics host controller and displays modules. This chipset is ideally suited for driving video data to displays requiring 18-bit color depth (RGB666 + HS, VS, and DE). The serializer converts 21 bit data over a single high-speed serial stream. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

The Deserializer inputs provide equalization control to compensate for loss from the media over longer distances. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.

The Serializer is offered in a 40-pin WQFN package and the Deserializer is offered in a 48-pin WQFN package.

The DS90UR903Q/DS90UR904Q chipset offers a FPD-Link II interface with a high-speed forward channel for data transmission over a single differential pair. The Serializer/ Deserializer pair is targeted for direct connections between graphics host controller and displays modules. This chipset is ideally suited for driving video data to displays requiring 18-bit color depth (RGB666 + HS, VS, and DE). The serializer converts 21 bit data over a single high-speed serial stream. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

The Deserializer inputs provide equalization control to compensate for loss from the media over longer distances. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.

The Serializer is offered in a 40-pin WQFN package and the Deserializer is offered in a 48-pin WQFN package.

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類型 標題 日期
* Data sheet DS90UR903Q/DS90UR904Q 10 - 43MHz 18 Bit Color FPD-Link II Serializer and Deserializer datasheet (Rev. C) PDF | HTML 2014年 7月 1日

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模擬型號

DS90UR903Q IBIS Model

SNLM120.ZIP (144 KB) - IBIS Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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WQFN (RTA) 40 Ultra Librarian

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  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
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