封裝資訊
封裝 | 引腳 WQFN (RHS) | 48 |
作業溫度範圍 (°C) -40 to 85 |
包裝數量 | 運送包裝 2,500 | LARGE T&R |
LMK02002 的特色
Target Applications
LMK02002 的說明
The
Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.
The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.