封裝資訊
| 封裝 | 引腳 SOT-SC70 (DCK) | 5 |
| 作業溫度範圍 (°C) -40 to 85 |
| 包裝數量 | 運送包裝 3,000 | LARGE T&R |
SN74AUC1G04 的特色
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Available in the Texas Instruments NanoFree™ Package
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial Power Down Mode and Back Drive Protection
- Sub-1-V Operable
- Max tpd of 2.2 ns at 1.8 V
- Low Power Consumption, 10-µA Maximum ICC
- ±8-mA Output Drive at 1.8 V
SN74AUC1G04 的說明
This single inverter gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC1G04 performs the Boolean function Y = A.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the ouput, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, see Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, SCEA027.